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Microarchitectural power modeling techniques for deep sub-micron microprocessors

Published: 09 August 2004 Publication History

Abstract

The need to perform early design studies that combine architectural simulation with power estimation has become critical as power has become a design constraint whose importance has moved to the fore. To satisfy this demand several microarchitectural power simulators have been developed around SimpleScalar, a widely used microarchitectural performance simulator. They have proven to be very useful at providing insights into power/performance trade-offs. However, they are neither parameterized nor technology scalable. In this paper, we propose more accurate parameterized power modeling techniques reflecting the actual technology parameters as well as input switching-events for memory and execution units. Compared to HSPICE, the proposed techniques show 93% and 91% accuracies for those blocks, but with a much faster simulation time. We also propose a more realistic power modeling technique for external I/O. In general, our approach includes more detailed microarchitectural and circuit modeling than has been the case in earlier simulators, without incurring a significant simulation time overhead--it can be as small as a few percent.

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cover image ACM Conferences
ISLPED '04: Proceedings of the 2004 international symposium on Low power electronics and design
August 2004
414 pages
ISBN:1581139292
DOI:10.1145/1013235
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 09 August 2004

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Author Tags

  1. deep sub-micron
  2. power modeling

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ISLPED04
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ISLPED04: International Symposium on Low Power Electronics and Design
August 9 - 11, 2004
California, Newport Beach, USA

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Overall Acceptance Rate 398 of 1,159 submissions, 34%

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