On optimality of adiabatic switching in MOS energy-recovery circuit

ABSTRACT

The principle of adiabatic switching in conventional energy-recovery adiabatic circuit is generally explained with the help of a rudimentary RC circuit being driven by a constant current source. However, it is not strictly accurate to approximate a MOS adiabatic circuit by such an elementary model owing to its failure to incorporate the nonlinearity of very deep sub-micron transistors. This paper employs the theory of variational calculus in order to extend the principle of optimality used in this RC model to general MOS adiabatic circuits. Our experimental results include energy dissipation comparison in various adiabatic schemes using optimal power clocking versus other waveforms.

REFERENCES

• 1: Massimo Alioto , Gaetano Palumbo, Power estimation in adiabatic circuits: a simple and accurate model, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.9 n.5, p.608-615, October 2001 [doi>10.1109/92.953495 ]
• 2: William C. Athas , Lars J. Svensson , Jeffrey G. Koller , Nestoras Tzartzanis , Eric Ying-Chin Chou, Low-power digital systems based on adiabatic-switching principles, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.2 n.4, p.398-407, Dec. 1994 [doi>10.1109/92.335009 ]
• 3: J. Denker. A review of adiabatic computing. In Proceedings of ISLPED, pages 94--97, Oct. 1994.
• 4: Suhwan Kim , Marios C. Papaefthymiou, True single-phase adiabatic circuitry, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.9 n.1, p.52-64, Feb. 2001 [doi>10.1109/92.920819 ]
• 5: Suhwan Kim , Conrad H. Ziesler , Marios C. Papaefthymiou, A true single-phase energy-recovery multiplier, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.11 n.2, p.194-207, April 2003 [doi>10.1109/TVLSI.2003.810795]
• 6: Dragan Maksimović , Vojin G. Oklobdžija , Borivoje Nikolić , K. Wayne Current, Clocked CMOS adiabatic logic with integrated single-phase power-clock supply, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.8 n.4, p.460-463, Aug. 2000 [doi>10.1109/92.863629 ]
• 7: V. Oklobdzija, D. Maksimovic, and F. Lin. Pass-transistor adiabatic logic using single power-clock supply. IEEE Trans. on Circuit and System II, 44(10):842--846, Oct. 1997.
• 8: T. Sakurai and A. Newton. Alpha-power law mosfet model and its applications to cmos inverter delay and other formulas. IEEE Journal of Solid-State Circuits, 25(2):584--594, Apr. 1990.
• 9: D. R. Smith. Vartional methods in optimization. Prentice-Hall, 1974.
• 10: L. Svensson and J. Koller. Driving a capacitive load without dissipating fcv2. In Proceedings of ISLPED, pages 100--101, Oct. 1994.

INDEX TERMS

Primary Classification:
  B. Hardware
  B.8 Performance and Reliability
      B.8.2 Performance Analysis and Design Aids

General Terms:
Design, Performance, Theory

Keywords:
adiabatic circuit, power clock optimization, variational calculus