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Characterization of MOS transistor current mismatch

Published: 04 September 2004 Publication History

Abstract

Electron device matching has been a key factor on the performance of today's analog or even digital electronic circuits. This paper presents a study of drain current matching in MOS transistors. CMOS test structures were designed and fabricated as a way to develop an extensive experimental work, where current mismatch was measured under a wide range of bias conditions. A model for MOS transistor mismatch was also developed, using the carrier number fluctuation theory to account for the effects of local doping fluctuations. This model shows a good fitting with measurements over a wide range of operation conditions, from weak to strong inversion, from linear to saturation region, and allows the assessment of mismatch from process and geometric parameters.

References

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    cover image ACM Conferences
    SBCCI '04: Proceedings of the 17th symposium on Integrated circuits and system design
    September 2004
    296 pages
    ISBN:1581139470
    DOI:10.1145/1016568
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 04 September 2004

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    Author Tags

    1. MOSFET
    2. analog design
    3. compact models
    4. matching
    5. mismatch

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    • (2010)Characterization of random process variations using ultralow-power, high-sensitivity, bias-free sub-threshold process sensorIEEE Transactions on Circuits and Systems Part I: Regular Papers10.1109/TCSI.2009.203744957:8(1838-1847)Online publication date: 1-Aug-2010
    • (2010)Variations: Sources and CharacterizationLow-Power Variation-Tolerant Design in Nanometer Silicon10.1007/978-1-4419-7418-1_1(3-39)Online publication date: 25-Oct-2010
    • (2009)A Local Random Variability Detector With Complete Digital On-Chip Measurement CircuitryIEEE Journal of Solid-State Circuits10.1109/JSSC.2009.202534244:9(2616-2623)Online publication date: Sep-2009
    • (2009)Mapping systematic and random process variations using Light emission from Off-State Leakage2009 IEEE International Reliability Physics Symposium10.1109/IRPS.2009.5173323(640-649)Online publication date: Apr-2009
    • (2008)An On-Chip Test Structure and Digital Measurement Method for Statistical Characterization of Local Random Variability in a ProcessIEEE Journal of Solid-State Circuits10.1109/JSSC.2008.200189643:9(1951-1963)Online publication date: Sep-2008
    • (2008)A Completely Digital On-Chip Circuit for Local-Random-Variability Measurement2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers10.1109/ISSCC.2008.4523232(412-623)Online publication date: Feb-2008
    • (2008)A high sensitivity process variation sensor utilizing sub-threshold operation2008 IEEE Custom Integrated Circuits Conference10.1109/CICC.2008.4672037(125-128)Online publication date: Sep-2008
    • (2006)A test chip for automatic MOSFET mismatch characterizationProceedings of the 19th annual symposium on Integrated circuits and systems design10.1145/1150343.1150369(83-88)Online publication date: 28-Aug-2006
    • (2006)MOSFET Mismatch ModelingIEEE Design & Test10.1109/MDT.2006.2023:1(20-29)Online publication date: 1-Jan-2006

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