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Design of RF CMOS low noise amplifiers using a current based MOSFET model

Published: 04 September 2004 Publication History

Abstract

This paper presents a design methodology for RF CMOS Low Noise Amplifiers (LNA). This methodology uses a current-based MOSFET model, which allows a detailed analysis of an LNA for all MOSFET's inversion regions. Design equations, including the induced gate noise in MOS devices are also presented and a design example with simulation results is shown.

References

[1]
A.N. Karanicolas, "A 2,7 V 900 MHZ CMOS LNA and mixer"in ISSCC Dig.Tech. Papers, 1996, vol. 39, pp 50--51.
[2]
D.K Schaeffer and T. H. Lee, "A 1,5-V, 1,5-GHz CMOS Low Noise Amplifier", IEEE J. Solid-State Circuits, vol 32, pp 745--759, May 1997.
[3]
Gatta Francesco el al. "A 2 dB Noise Figure 900MHz Differential CMOS LNA" IEEE J. Solid-State Circuits, vol 36 n 10 Oct. 2001
[4]
C. Galup-Montoro, M.C. Schneider and A.I.A. Cunha "A current-based MOSFET model for integrated circuit design", Chapter 2 in Low-Voltage/Low Power Integraed Circuits and Systems, Edited by E. Sánchez-Sinencio and A.C. Andreou, pp. 7--55 IEE Press, New Jersey, 1999.
[5]
T.H. Lee, "The Design of CMOS Radio-Frequency Integrated Circuits"Cambridge University Press, United States of America, 1998.

Cited By

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  • (2020)Design of Cmos Low Noise Amplifier using an Automated System-on-Chip Methodology2020 37th National Radio Science Conference (NRSC)10.1109/NRSC49500.2020.9235115(181-188)Online publication date: 8-Sep-2020
  • (2018)Design of inductively degenerated common source RF CMOS Low Noise AmplifierSādhanā10.1007/s12046-018-1017-544:1Online publication date: 10-Dec-2018
  • (2018)Multi-objective Low-Noise Amplifier Optimization Using Analytical Model and Genetic ComputationCircuits, Systems, and Signal Processing10.1007/s00034-017-0634-236:12(4963-4993)Online publication date: 27-Dec-2018
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  1. Design of RF CMOS low noise amplifiers using a current based MOSFET model

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      cover image ACM Conferences
      SBCCI '04: Proceedings of the 17th symposium on Integrated circuits and system design
      September 2004
      296 pages
      ISBN:1581139470
      DOI:10.1145/1016568
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Publication History

      Published: 04 September 2004

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      Author Tags

      1. CMOS
      2. LNA
      3. RF
      4. noise

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      Overall Acceptance Rate 133 of 347 submissions, 38%

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      View all
      • (2020)Design of Cmos Low Noise Amplifier using an Automated System-on-Chip Methodology2020 37th National Radio Science Conference (NRSC)10.1109/NRSC49500.2020.9235115(181-188)Online publication date: 8-Sep-2020
      • (2018)Design of inductively degenerated common source RF CMOS Low Noise AmplifierSādhanā10.1007/s12046-018-1017-544:1Online publication date: 10-Dec-2018
      • (2018)Multi-objective Low-Noise Amplifier Optimization Using Analytical Model and Genetic ComputationCircuits, Systems, and Signal Processing10.1007/s00034-017-0634-236:12(4963-4993)Online publication date: 27-Dec-2018
      • (2017)Optimization of RF low noise amplifier design using analytical model and genetic computation2017 MIXDES - 24th International Conference "Mixed Design of Integrated Circuits and Systems10.23919/MIXDES.2017.8005220(302-307)Online publication date: Jun-2017
      • (2012)The Study on Evolvable Electrical Circuit Design Based on FPGAAdvanced Materials Research10.4028/www.scientific.net/AMR.433-440.5494433-440(5494-5499)Online publication date: Jan-2012
      • (2009)Hardware realization of concise evolutionary algorithm on FPEA2009 IEEE 10th International Conference on Computer-Aided Industrial Design & Conceptual Design10.1109/CAIDCD.2009.5374864(2370-2373)Online publication date: Nov-2009
      • (2008)An Implementation of Compact Genetic Algorithm on FPGA for Extrinsic Evolvable Hardware2008 4th Southern Conference on Programmable Logic10.1109/SPL.2008.4547754(187-190)Online publication date: Mar-2008
      • (2006)Inversion-Coefficient Based Design of RF CMOS Low-Noise Amplifiers2006 13th IEEE International Conference on Electronics, Circuits and Systems10.1109/ICECS.2006.379704(74-77)Online publication date: Dec-2006
      • (2005)Design and power optimization of CMOS RF blocks operating in the moderate inversion regionProceedings of the 18th annual symposium on Integrated circuits and system design10.1145/1081081.1081117(127-132)Online publication date: 4-Sep-2005

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