ABSTRACT
In this paper we propose and develop a fully programmable CNN circuit. The CNN coefficients are digitally programmable using a Digital to Analog Converter (DAC), resulting in added flexibility.CNNs with 4x4 and 16x16 cells are designed and tested, exhibiting good accuracy when compared with Matlab and Java applications for computing CNNs.All circuits are designed and implemented with a 0.35um CMOS technology. The layout of a full 4x4 CNN was designed using Cadence Design Framework II. The circuits are simulated with Pspice/Spectre.
- L. O. Chua and L. Yang, "Cellular neural networks: Theory," IEEE Trans. Circuits Syst., vol. CAS-35, pp. 1257--1274, October 1988.Google Scholar
- L. O. Chua and L. Yang, "Cellular neural networks: Applications," IEEE Trans. Circuits Syst., vol. CAS-35, pp. 1275--1290, October 1988.Google Scholar
- M. Hanggi, "Cellular Neural Network Simulator" http://www.isi.ee.ethz.ch/~haenggi/CNNsim.html, 2001.Google Scholar
- A.Sedra and K.Smith, Microelectronic Circuits, 3rd Edition, Saunders College Publishing, 1991. Google ScholarDigital Library
- M. Valle and F. Diotalevi, "An analog CMOS four quadrant current-mode Multiplier for low power artificial neural networks implementation", Dep. of Biophysical and Electronic Engineering, Univ. of Genova.Google Scholar
- G. F. Dalla Betta, S.Graffi, Zs. Kovacs, and G. Masetti, "CMOS Implementation of an Analogically Programmable Cellular Neural Network," IEEE Trans. Circ. Syst. II, vol. 40, pp. 206--215, March 1993.Google ScholarCross Ref
- L. Wang, J. Gyvez, and E. Sanchez-Sinencio, "Time Multiplexed Color Image Processing Based on a CNN with Cell-State Outputs," IEEE Trans. on VLSI Systems, vol. 6 No. 2, pp. 314--322, June 1998. Google ScholarDigital Library
- K.Lakshmikumar et al, "A Baseband Codec for Digital Cellular Telephony", IEEE Journal of Solid-State Circuits, vol. 26, no. 12, pp. 1951--1958, Dec. 1991.Google ScholarCross Ref
- J. Vital, A. Marques, P. Azevedo and J. Franca, "Design Considerations for a Retargetable 12b 200MHz CMOS Current-Steering DAC", ChipIdea-Microelectrónica, S.A.Google Scholar
- J. Bastos, A Marques, M. Steyaert and W. Sansen, "A 12-Bit Intrinsic Accuracy High-Speed CMOS DAC", IEEE Journal of Solid-State Circuits, vol. 33, no. 12, pp. 1959--1969, Dec. 1998.Google ScholarCross Ref
Index Terms
- A programmable cellular neural network circuit
Recommendations
Design and implementation of a cellular neural network based oscillator circuit
CSECS'09: Proceedings of the 8th WSEAS International Conference on Circuits, systems, electronics, control & signal processingIn this paper, a novel inductorless oscillator circuit with negative feedbacks, based on a simple version of a "Cellular Neural Network" (CNN) called "CNN with an Opposite Sign Template" (CNN-OST) is designed and implemented. The system is capable of ...
A low-cost programmable clock generator for switched-capacitor circuit applications
This paper presents two improved circuit techniques that allow the design of a low-cost programmable clock generator using a ring oscillator for low-frequency switched-capacitor applications. The first technique aims at reducing the frequency of the ...
Order-Configurable Programmable Power-Efficient FIR Filters
HIPC '96: Proceedings of the Third International Conference on High-Performance Computing (HiPC '96)We present a novel VLSI implementation of an order-configurable, coefficient-programmable, and power-efficient FIR filter architecture. This single-chip architecture contains 4 multiply-add functional units and each functional unit can have up to 8 ...
Comments