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Architecture Adaptive Routability-Driven Placement for FPGAs (abstract only)
Source International Symposium on Field Programmable Gate Arrays archive
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays table of contents
Monterey, California, USA
POSTER SESSION: New CAD techniques and methods table of contents
Pages: 266 - 266  
Year of Publication: 2005
ISBN:1-59593-029-9
Authors
Akshay Sharma  University of Washington, Seattle, WA
Carl Ebeling  University of Washington, Seattle, WA
Scott Hauck  University of Washington, Seattle, WA
Sponsors
ACM: Association for Computing Machinery
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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ABSTRACT

Current FPGA placement algorithms estimate the routability of a placement using architecture-specific metrics. The shortcoming of using architecture-specific routability estimates is limited adaptability. A placement algorithm that is targeted to a class of architecturally similar FPGAs may not be easily adapted to other architectures. The subject of this paper is the development of a routability-driven architecture adaptive FPGA placement algorithm called Independence. The core of the Independence algorithm is a simultaneous place-and-route approach that tightly couples a simulated annealing placement algorithm with an architecture adaptive FPGA router (Pathfinder). The results of our experiments demonstrate Independence's adaptability to island-style and hierarchical FPGA architectures. The quality of the placements produced by Independence is within 5% of the quality of VPR's placements and 17% better than the placements produced by HSRA's place-and-route tool. Further, our results show that Independence produces clearly superior placements on routing-poor island-style FPGA architectures.


Collaborative Colleagues:
Akshay Sharma: colleagues
Carl Ebeling: colleagues
Scott Hauck: colleagues