Cited By
View all- Suthar VDutt SGielen G(2006)Efficient on-line interconnect testing in FPGAs with provable detectability for multiple faultsProceedings of the conference on Design, automation and test in Europe: Proceedings10.5555/1131481.1131803(1165-1170)Online publication date: 6-Mar-2006
- Suthar VDutt S(2006)Mixed PLB and Interconnect BIST for FPGAs Without Fault-Free AssumptionsProceedings of the 24th IEEE VLSI Test Symposium10.1109/VTS.2006.47(36-43)Online publication date: 30-Apr-2006
- Suthar VDutt S(2006)Efficient On-line Interconnect Testing in FPGAs with Provable Detectability for Multiple FaultsProceedings of the Design Automation & Test in Europe Conference10.1109/DATE.2006.244017(1-6)Online publication date: 2006