Article

Untestable fault identification through enhanced necessary value assignments

Authors:

Vishnu C. Vimjam,

Michael S. HsiaoAuthors Info & Claims

GLSVLSI '05: Proceedings of the 15th ACM Great Lakes symposium on VLSI

Pages 176 - 181

https://doi.org/10.1145/1057661.1057705

Published: 17 April 2005 Publication History

Abstract

In this paper, we propose novel low-cost methods that combine static logic implications and binary resolution to significantly increase the number of non-trivial signal relations learned from the circuit. The proposed method first applies resolution techniques to learn new static single-node implications and then uses them to learn powerful multi-node implications. All the newly learned relations help in extracting more necessary assignments for a given fault, potentially increasing the chance for a conflict to occur among the necessary assignments. Experimental results on ISCAS89 and ITC99 benchmarks show that our method can identify significantly more untestable faults compared to existing non branch-and-bound based techniques.

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Cited By

Hosokawa TNiseki MYoshimura MYamazaki HArai MYotsuyanagi HHashizume M(2018)A Sequentially Untestable Fault Identification Method Based on n-Bit State Cube Justification2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS)10.1109/IOLTS.2018.8474268(43-46)Online publication date: Jul-2018
https://doi.org/10.1109/IOLTS.2018.8474268

Index Terms

Untestable fault identification through enhanced necessary value assignments
1. Hardware
  1. Hardware test
  2. Robustness

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cover image ACM Conferences

GLSVLSI '05: Proceedings of the 15th ACM Great Lakes symposium on VLSI

April 2005

518 pages

ISBN:1595930574

DOI:10.1145/1057661

General Chair:
John Lach
University of Virginia
,
Program Chairs:
Gang Qu
University of Maryland, College Park
,
Yehea Ismail
Northwestern University

Copyright © 2005 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 17 April 2005

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GLSVLSI05: Great Lakes Symposium on VLSI 2005

April 17 - 19, 2005

Illinois, Chicago, USA

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Overall Acceptance Rate 312 of 1,156 submissions, 27%

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Cited By

Hosokawa TNiseki MYoshimura MYamazaki HArai MYotsuyanagi HHashizume M(2018)A Sequentially Untestable Fault Identification Method Based on n-Bit State Cube Justification2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS)10.1109/IOLTS.2018.8474268(43-46)Online publication date: Jul-2018
https://doi.org/10.1109/IOLTS.2018.8474268

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