Article

Test set enhancement for quality transition faults using function-based methods

Authors:

Stelios Neophytou,

Maria K. Michael,

Spyros TragoudasAuthors Info & Claims

GLSVLSI '05: Proceedings of the 15th ACM Great Lakes symposium on VLSI

Pages 182 - 187

https://doi.org/10.1145/1057661.1057706

Published: 17 April 2005 Publication History

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Abstract

A recent method generates high quality tests for transition faults using functions. Event sensitization criteria as well as path lengths can be taken into consideration during the generation of such test functions. It is shown how to manipulate the test functions to generate compact test sets. Experimental results on ISCAS'85 and ISCAS'89 circuits show that a compaction rate of the order of 70% to 84% is achieved without compromising fault coverage. Moreover, a novel method to enrich the compacted test set with additional vectors is presented so that transition faults are tested through different activation and propagation paths. Such test sets havehigher quality, compared to traditional transition fault test sets, since events propagate through many critical paths.

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Neophytou SMichael M(2010)Test Set Generation with a Large Number of Unspecified Bits Using Static and Dynamic TechniquesIEEE Transactions on Computers10.1109/TC.2009.17859:3(301-316)Online publication date: 1-Mar-2010
https://dl.acm.org/doi/10.1109/TC.2009.178
Kumar MTragoudas S(2007)High-Quality Transition Fault ATPG for Small Delay DefectsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2006.88486326:5(983-989)Online publication date: 1-May-2007
https://dl.acm.org/doi/10.1109/TCAD.2006.884863

Index Terms

Test set enhancement for quality transition faults using function-based methods
1. Hardware
  1. Hardware test
  2. Robustness

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GLSVLSI '05: Proceedings of the 15th ACM Great Lakes symposium on VLSI

April 2005

518 pages

ISBN:1595930574

DOI:10.1145/1057661

General Chair:
John Lach
University of Virginia
,
Program Chairs:
Gang Qu
University of Maryland, College Park
,
Yehea Ismail
Northwestern University

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Published: 17 April 2005

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April 17 - 19, 2005

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Neophytou SMichael M(2010)Test Set Generation with a Large Number of Unspecified Bits Using Static and Dynamic TechniquesIEEE Transactions on Computers10.1109/TC.2009.17859:3(301-316)Online publication date: 1-Mar-2010
https://dl.acm.org/doi/10.1109/TC.2009.178
Kumar MTragoudas S(2007)High-Quality Transition Fault ATPG for Small Delay DefectsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2006.88486326:5(983-989)Online publication date: 1-May-2007
https://dl.acm.org/doi/10.1109/TCAD.2006.884863

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Recommendations

Deterministic broadside test generation for transition path delay faults

Functions for Quality Transition-Fault Tests and Their Applications in Test-Set Enhancement

Hybrid BIST optimization using reseeding and test set compaction

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