Article

Diagnosing multiple transition faults in the absence of timing information

Authors:

Jiang Brandon Liu,

Magdy Abadir,

Andreas Veneris,

Sean SafarpourAuthors Info & Claims

GLSVLSI '05: Proceedings of the 15th ACM Great Lakes symposium on VLSI

Pages 193 - 196

https://doi.org/10.1145/1057661.1057708

Published: 17 April 2005 Publication History

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Abstract

As timing requirements in today's advanced VLSI designs become more aggressive, the need for automated tools to diagnose timing failures increases. This work presents two such algorithms capable of diagnosing multiple delay faults. One method uses multiple transition fault models and the other reasons with ternary logic values, thus achieving model independent diagnosis. Experiments are conducted on IS-CAS'85 combinational and full-scan version of ISCAS'89 se-quential circuits corrupted with multiple transition faults. The performance of both algorithms are evaluated and compared. The results show good efficiency and diagnostic resolution.

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Cited By

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Toulas TTragoudas S(2017)Diagnosis with transition faults on embedded segments2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design (IOLTS)10.1109/IOLTS.2017.8046173(25-27)Online publication date: Jul-2017
https://doi.org/10.1109/IOLTS.2017.8046173
Aljubouri WTragoudas SHaniotakis T(2016)Identification of delay defects on embedded paths using one current sensor2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS)10.1109/DTIS.2016.7483809(1-4)Online publication date: Apr-2016
https://doi.org/10.1109/DTIS.2016.7483809
Toulas TTragoudas S(2016)Operations on Multiple Transition Faults without EnumerationMATEC Web of Conferences10.1051/matecconf/2016760101276(01012)Online publication date: 21-Oct-2016
https://doi.org/10.1051/matecconf/20167601012
Show More Cited By

Index Terms

Diagnosing multiple transition faults in the absence of timing information
1. Applied computing
  1. Arts and humanities
    1. Architecture (buildings)
      1. Computer-aided design
  2. Physical sciences and engineering
    1. Engineering
      1. Computer-aided design

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Published In

GLSVLSI '05: Proceedings of the 15th ACM Great Lakes symposium on VLSI

April 2005

518 pages

ISBN:1595930574

DOI:10.1145/1057661

General Chair:
John Lach
University of Virginia
,
Program Chairs:
Gang Qu
University of Maryland, College Park
,
Yehea Ismail
Northwestern University

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

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Published: 17 April 2005

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GLSVLSI05: Great Lakes Symposium on VLSI 2005

April 17 - 19, 2005

Illinois, Chicago, USA

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Overall Acceptance Rate 312 of 1,156 submissions, 27%

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Toulas TTragoudas S(2017)Diagnosis with transition faults on embedded segments2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design (IOLTS)10.1109/IOLTS.2017.8046173(25-27)Online publication date: Jul-2017
https://doi.org/10.1109/IOLTS.2017.8046173
Aljubouri WTragoudas SHaniotakis T(2016)Identification of delay defects on embedded paths using one current sensor2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS)10.1109/DTIS.2016.7483809(1-4)Online publication date: Apr-2016
https://doi.org/10.1109/DTIS.2016.7483809
Toulas TTragoudas S(2016)Operations on Multiple Transition Faults without EnumerationMATEC Web of Conferences10.1051/matecconf/2016760101276(01012)Online publication date: 21-Oct-2016
https://doi.org/10.1051/matecconf/20167601012
Qian XSingh AChatterjee A(2011)Diagnosing Multiple Slow Gates for Performance Tuning in the Face of Extreme Process VariationsProceedings of the 2011 Asian Test Symposium10.1109/ATS.2011.73(303-310)Online publication date: 20-Nov-2011
https://dl.acm.org/doi/10.1109/ATS.2011.73
Mehta VMarek-Sadowska MTsai KRajski J(2009)Timing-aware multiple-delay-fault diagnosisIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2008.200916428:2(245-258)Online publication date: 1-Feb-2009
https://dl.acm.org/doi/10.1109/TCAD.2008.2009164
Mehta VMarek-Sadowska MTsai KRajski J(2008)Timing-Aware Multiple-Delay-Fault Diagnosis9th International Symposium on Quality Electronic Design (isqed 2008)10.1109/ISQED.2008.4479734(246-253)Online publication date: Mar-2008
https://doi.org/10.1109/ISQED.2008.4479734

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Unspecified Transition Faults: A Transition Fault Model for At-Speed Fault Simulation and Test Generation

Diagnostic Test Generation for Transition Delay Faults Using Stuck-At Fault Detection Tools

A Test Pattern Quality Metric for Diagnosis of Multiple Stuck-at and Transition faults

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