Article

Low-power circuits using dynamic threshold devices

Author:

Paul BeckettAuthors Info & Claims

GLSVLSI '05: Proceedings of the 15th ACM Great Lakes symposium on VLSI

Pages 213 - 216

https://doi.org/10.1145/1057661.1057713

Published: 17 April 2005 Publication History

Abstract

We present simulations for ultra-thin body, fully-depleted, double-gate (DG) silicon-on-insulator (SOI) devices that can be readily optimized for both static power loss and performance by dynamically shifting the threshold voltage during operation. A small number of simple circuits are analyzed and it is demonstrated that subthreshold power can be reduced by a factor in excess of 10³ for these examples.

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Cited By

Jabeur KO'Connor INavarro DLe Beux SMoritz C(2012)Low-power design technique with ambipolar double gate devicesProceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures10.1145/2765491.2765495(14-21)Online publication date: 4-Jul-2012
https://dl.acm.org/doi/10.1145/2765491.2765495
Mishra PMuttreja AJha N(2009)Low-power FinFET circuit synthesis using multiple supply and threshold voltagesACM Journal on Emerging Technologies in Computing Systems10.1145/1543438.15434405:2(1-23)Online publication date: 16-Jul-2009
https://dl.acm.org/doi/10.1145/1543438.1543440
Muttreja AMishra PJha N(2008)Threshold Voltage Control through Multiple Supply Voltages for Power-Efficient FinFET InterconnectsProceedings of the 21st International Conference on VLSI Design10.1109/VLSI.2008.117(220-227)Online publication date: 4-Jan-2008
https://dl.acm.org/doi/10.1109/VLSI.2008.117
Show More Cited By

Index Terms

Low-power circuits using dynamic threshold devices
1. Hardware
  1. Emerging technologies
  2. Very large scale integration design

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Published In

cover image ACM Conferences

GLSVLSI '05: Proceedings of the 15th ACM Great Lakes symposium on VLSI

April 2005

518 pages

ISBN:1595930574

DOI:10.1145/1057661

General Chair:
John Lach
University of Virginia
,
Program Chairs:
Gang Qu
University of Maryland, College Park
,
Yehea Ismail
Northwestern University

Copyright © 2005 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 17 April 2005

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GLSVLSI05: Great Lakes Symposium on VLSI 2005

April 17 - 19, 2005

Illinois, Chicago, USA

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Overall Acceptance Rate 312 of 1,156 submissions, 27%

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Citations

Cited By

Jabeur KO'Connor INavarro DLe Beux SMoritz C(2012)Low-power design technique with ambipolar double gate devicesProceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures10.1145/2765491.2765495(14-21)Online publication date: 4-Jul-2012
https://dl.acm.org/doi/10.1145/2765491.2765495
Mishra PMuttreja AJha N(2009)Low-power FinFET circuit synthesis using multiple supply and threshold voltagesACM Journal on Emerging Technologies in Computing Systems10.1145/1543438.15434405:2(1-23)Online publication date: 16-Jul-2009
https://dl.acm.org/doi/10.1145/1543438.1543440
Muttreja AMishra PJha N(2008)Threshold Voltage Control through Multiple Supply Voltages for Power-Efficient FinFET InterconnectsProceedings of the 21st International Conference on VLSI Design10.1109/VLSI.2008.117(220-227)Online publication date: 4-Jan-2008
https://dl.acm.org/doi/10.1109/VLSI.2008.117
Mishra PMuttreja AJha N(2008)Evaluation of multiple supply and threshold voltages for low-power FinFET circuit synthesisProceedings of the 2008 IEEE International Symposium on Nanoscale Architectures10.1109/NANOARCH.2008.4585795(77-84)Online publication date: 12-Jun-2008
https://dl.acm.org/doi/10.1109/NANOARCH.2008.4585795
Muttreja AAgarwal NJha N(2007)CMOS logic design with independent-gate FinFETs2007 25th International Conference on Computer Design10.1109/ICCD.2007.4601953(560-567)Online publication date: Oct-2007
https://doi.org/10.1109/ICCD.2007.4601953
Beckett P(2005)A Nanowire Array for Reconfigurable ComputingTENCON 2005 - 2005 IEEE Region 10 Conference10.1109/TENCON.2005.301252(1-6)Online publication date: Nov-2005
https://doi.org/10.1109/TENCON.2005.301252

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