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Combining stack caching with dynamic superinstructions
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Source Interpreters, Virtual Machines And Emulators archive
Proceedings of the 2004 workshop on Interpreters, virtual machines and emulators table of contents
Washington, D.C.
SESSION: Research papers I table of contents
Pages: 7 - 14  
Year of Publication: 2004
ISBN:1-58113-909-8
Authors
M. Anton Ertl  TU Wien
David Gregg  Trinity College, Dublin
Sponsors
ACM: Association for Computing Machinery
SIGPLAN: ACM Special Interest Group on Programming Languages
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 5,   Downloads (12 Months): 36,   Citation Count: 3
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ABSTRACT

Dynamic superinstructions eliminate most of the interpreter dispatch overhead. This results in a higher proportion of interpreter time spent in stack accesses (on a stack-based virtual machine). Stack caching reduces the stack access overhead. Each of these optimizations provides more speedup, if the other one is applied, too. Combining these optimizations also opens additional opportunities: we can insert stack state transitions without dispatch cost; this reduces the number of necessary VM instruction instances significantly. A shortest-path search can find the optimal sequence of state transitions and VM instructions. In this paper we describe an implementation of static stack caching employing these ideas. We also represent empirical results for our implementation, resulting in a speedup of up to 58% over a version that keeps one value in registers all the time.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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{Gri01} Robert Griesemer. Interpreter generation and implementation utilizing interpreter states and register caching. Patent 6192516 B1, US, 2001.
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{RS96} Markku Rossi and Kengatharan Sivalingam. A survey of instruction dispatch techniques for byte-code interpreters. Technical Report TKO-C79, Faculty of Information Technology, Helsinki University of Technology, May 1996.
 
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Collaborative Colleagues:
M. Anton Ertl: colleagues
David Gregg: colleagues