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Formal loop merging for signal transforms

Published: 12 June 2005 Publication History

Abstract

A critical optimization in the domain of linear signal transforms, such as the discrete Fourier transform (DFT), is loop merging, which increases data locality and reuse and thus performance. In particular, this includes the conversion of shuffle operations into array reindexings. To date, loop merging is well understood only for the DFT, and only for Cooley-Tukey FFT based algorithms, which excludes DFT sizes divisible by large primes. In this paper, we present a formal loop merging framework for general signal transforms and its implementation within the SPIRAL code generator. The framework consists of Ε-SPL, a mathematical language to express loops and index mappings; a rewriting system to merge loops in Ε-SPL and a compiler that translates Ε-SPL into code. We apply the framework to DFT sizes that cannot be handled using only the Cooley-Tukey FFT and compare our method to FFTW 3.0.1 and the vendor library Intel MKL 7.2.1. Compared to FFTW our generated code is a factor of 2--4 faster under equal implementation conditions (same algorithms, same unrolling threshold). For some sizes we show a speed-up of a factor of 9 using Bluestein's algorithm. Further, we give a detailed comparison against the Intel vendor library MKL; our generated code is between 2 times faster and 4.5 times slower.

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Published In

cover image ACM SIGPLAN Notices
ACM SIGPLAN Notices  Volume 40, Issue 6
Proceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation
June 2005
325 pages
ISSN:0362-1340
EISSN:1558-1160
DOI:10.1145/1064978
Issue’s Table of Contents
  • cover image ACM Conferences
    PLDI '05: Proceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation
    June 2005
    338 pages
    ISBN:1595930566
    DOI:10.1145/1065010
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 12 June 2005
Published in SIGPLAN Volume 40, Issue 6

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Author Tags

  1. DFT
  2. automatic performance tuning
  3. discrete Fourier transform
  4. domain-specific language
  5. linear signal transform
  6. loop optimization

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  • (2020)Automatic Generation of High-Performance FFT Kernels on Arm and X86 CPUsIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2020.297762931:8(1925-1941)Online publication date: 1-Aug-2020
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