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A novel synthesis approach for active leakage power reduction using dynamic supply gating

Published: 13 June 2005 Publication History

Abstract

Due to exponential increase in subthreshold leakage with technology scaling and temperature increase, leakage power is becoming a major fraction of total power in the active mode. We present a novel low-cost design methodology with associated synthesis flow for reducing both switching and active leakage power using dynamic supply gating. A logic synthesis approach based on Shannon expansion is proposed that dynamically applies supply gating to idle parts of general logic circuits even when they are performing useful computation. Experimental results on a set of MCNC benchmark circuits in a predictive 70nm process exhibits improvements of 15% to 88% in total active power compared to the results obtained by a conventional optimization flow.

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J.W. Tschanz et al. "Dynamic sleep transistor and body bias for active leakage power control of microprocessors," IEEE JSSC, vol. 38, pp. 1838--1845, 2003.
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Cited By

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  • (2020)A New Systematic Gdi Circuit Synthesis Using Mux Based Decomposition Algorithm And Binary Decision Diagram For Low Power Asic Circuit DesignMicroelectronics Journal10.1016/j.mejo.2020.104963(104963)Online publication date: Dec-2020
  • (2013)Circuit Design Methodologies for Test Power Reduction in Nano-Scaled TechnologiesProceedings of International Conference on VLSI, Communication, Advanced Devices, Signals & Systems and Networking (VCASAN-2013)10.1007/978-81-322-1524-0_20(139-149)Online publication date: 10-Jul-2013
  • (2012)Width-Aware Fine-Grained Dynamic Supply GatingProceedings of the 2012 25th International Conference on VLSI Design10.1109/VLSID.2012.94(340-345)Online publication date: 7-Jan-2012
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      cover image ACM Conferences
      DAC '05: Proceedings of the 42nd annual Design Automation Conference
      June 2005
      984 pages
      ISBN:1595930582
      DOI:10.1145/1065579
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Published: 13 June 2005

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      June 13 - 17, 2005
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      Cited By

      View all
      • (2020)A New Systematic Gdi Circuit Synthesis Using Mux Based Decomposition Algorithm And Binary Decision Diagram For Low Power Asic Circuit DesignMicroelectronics Journal10.1016/j.mejo.2020.104963(104963)Online publication date: Dec-2020
      • (2013)Circuit Design Methodologies for Test Power Reduction in Nano-Scaled TechnologiesProceedings of International Conference on VLSI, Communication, Advanced Devices, Signals & Systems and Networking (VCASAN-2013)10.1007/978-81-322-1524-0_20(139-149)Online publication date: 10-Jul-2013
      • (2012)Width-Aware Fine-Grained Dynamic Supply GatingProceedings of the 2012 25th International Conference on VLSI Design10.1109/VLSID.2012.94(340-345)Online publication date: 7-Jan-2012
      • (2011)Maintaining performance on power gating of microprocessor functional units by using a predictive pre-wakeup strategyACM Transactions on Architecture and Code Optimization10.1145/2019608.20196158:3(1-27)Online publication date: 18-Oct-2011
      • (2011)An approximation algorithm for cofactoring-based synthesisProceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI10.1145/1973009.1973048(193-198)Online publication date: 2-May-2011
      • (2011)Simultaneous Reverse Body and Negative Word-Line Biasing Control Scheme for Leakage Reduction of DRAMIEEE Journal of Solid-State Circuits10.1109/JSSC.2011.216218446:10(2396-2405)Online publication date: Oct-2011
      • (2011)Integrated Design & TestProceedings of the 2011 Asian Test Symposium10.1109/ATS.2011.100(486-491)Online publication date: 20-Nov-2011
      • (2010)Power gatingACM Transactions on Design Automation of Electronic Systems10.1145/1835420.183542115:4(1-37)Online publication date: 7-Oct-2010
      • (2010)Hardware PlatformsHardware Acceleration of EDA Algorithms10.1007/978-1-4419-0944-2_2(9-22)Online publication date: 18-Jan-2010
      • (2009)Temporal and spatial idleness exploitation for optimal-grained leakage controlProceedings of the 2009 International Conference on Computer-Aided Design10.1145/1687399.1687487(468-473)Online publication date: 2-Nov-2009
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