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Resistive-open defect injection in SRAM core-cell: analysis and comparison between 0.13 μm and 90 nm technologies

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Published:13 June 2005Publication History

ABSTRACT

Resistive-open defects appear more and more frequently in VDSM technologies. In this paper we present a study concerning resistive-open defects in the core-cell of SRAM memories. The first target of this work is a comparison of the effect produced by resistive-open defects in the 0.13 μm and 90 nm core-cell. We show that the 90 nm core-cell is more robust than the 0.13 μm core-cell in presence of resistive-open defects. On the other hand we show that dynamic faults are most likely to occur in the 90 nm than in 0.13 μm core-cell. Finally we propose a unique March test solution that ensures the complete coverage of all the extracted fault models for both technologies.

References

  1. Semiconductor Industry Association (SIA), "International Technology Roadmap for Semiconductors (ITRS)", 2003 Edition.Google ScholarGoogle Scholar
  2. A.J. van de Goor, "Using March Tests to Test SRAMs", IEEE Design & Test of Computers, vol.10, n°°1, Jun 1993, pp.8--14. Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. R.D. Adams and E.S. Cooley, "Analysis of Deceptive Destructive Read Memory Fault Model and Recommended Testing", IEEE North Atlantic Test Workshop, May 1996.Google ScholarGoogle Scholar
  4. K. Baker et al., "Defect-Based Delay Testing of Resistive Vias-Contacts. A Critical Evaluation", Proc. Int. Test Conference, 1999, pp. 467--476. Google ScholarGoogle ScholarDigital LibraryDigital Library
  5. C.-M. James et al., "Testing for Resistive Opens and Stuck Opens", Proc. Int. Test Conference, 2001, pp. 1049--1058. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. W. Needham et al., "High Volume Microprocessor Test Escapes - An Analysis of Defects Our Tests are Missing", Proc. Int. Test Conference, 1998, pp. 25--34. Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. A.J. van de Goor and Z. Al-Ars, "Functional Memory Faults: A Formal Notation and a Taxonomy", Proc. IEEE VLSI Test Symposium, May 2000, pp.281--289. Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. Z. Al-Ars and A.J. van de Goor, "Static and Dynamic Behavior of Memory Cell Array Opens and Shorts in Embedded DRAMs", Proc. Design, Automation and Test in Europe, 2001, pp. 496--503. Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. S. Hamdioui, Z Al-Ars and A.J. van de Goor, "Testing Static and Dynamic Faults in Random Access Memories", Proc. IEEE VLSI Test Symposium, 2002, pp. 395--400. Google ScholarGoogle ScholarDigital LibraryDigital Library
  10. Borri, M. Hage-Hassan, P. Girard, S. Pravossoudovitch, A. Virazel, "Defect-Oriented Dynamic Fault Models for Embedded-SRAMs", Proc. IEEE European Test Workshop, 2003, pp. 23--28. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. L. Dilillo, P. Girard, S. Pravossoudovitch, A. Virazel, S. Borri, M. Hage-Hassan, "Dynamic Read Destructive Fault in Embedded-SRAMs: Analysis and March Test Solutions", Proc. IEEE European Test Symposium, 2004. Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. D. Niggemeyer, M. Redeker and J. Otterstedt, "Integration of Non-classical Faults in Standard March Tests", Records of the IEEE Int. Workshop on Memory Technology, Design and Testing, 1998, pp. 91--96. Google ScholarGoogle ScholarDigital LibraryDigital Library
  13. M. Nicolaidis, "Theory of Transparent BIST for RAMs", IEEE Trans. On Computers, vol. 45, N° 10, October 1996, pp. 1141--1155. Google ScholarGoogle ScholarDigital LibraryDigital Library

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  • Published in

    cover image ACM Conferences
    DAC '05: Proceedings of the 42nd annual Design Automation Conference
    June 2005
    984 pages
    ISBN:1595930582
    DOI:10.1145/1065579

    Copyright © 2005 ACM

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    Publication History

    • Published: 13 June 2005

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