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Automatic generation of application-specific systems based on a micro-programmed Java core
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Proceedings of the 2005 ACM symposium on Applied computing table of contents
Santa Fe, New Mexico
SESSION: Embedded systems: applications, solutions and techniques (EMBS) table of contents
Pages: 879 - 884  
Year of Publication: 2005
ISBN:1-58113-964-0
Authors
F. Gruian  Lund University, Lund Sweden
P. Andersson  Lund University, Lund Sweden
K. Kuchcinski  Lund University, Lund Sweden
M. Schoeberl  JOP.Design, Vienna Austria
Sponsor
SIGAPP: ACM Special Interest Group on Applied Computing
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 4,   Downloads (12 Months): 24,   Citation Count: 2
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ABSTRACT

This paper describes a co-design based approach for automatic generation of application specific systems, suitable for FPGA-centric embedded applications. The approach augments a processor core with hardware accelerators extracted automatically from a high-level specification (Java) of the application, to obtain a custom system, optimised for the target application. We advocate herein the use of a microprogrammed core as the basis for system generation in order to hide the hardware access operations in the micro-code, while conserving the core data-path (and clock frequency). To prove the feasibility of our approach, we also present an implementation based on a modified version of the Java Optimized Processor soft core on a Xilinx Virtex-II FPGA.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
P. Andersson and K. Kuchcinski. Automatic local memory architecture generation for data reuse in custom data paths. In International Conference on Engineering of Reconfigurable Systems and Algorithms, June 21-24 2004.
 
2
J. M. P. Cardoso and H. C. Neto. Fast hardware compilation of behaviors into an FPGA-based dynamic reconfigurable computing system. In The XII Symposium on Integrated Circuits and System Design, pages 150--153, October 1999.
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IBM. On-chip peripheral bus, architecture specifications, version 2.1. Technical Report SA-14-2528-02, IBM, 2001.
 
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Insight Memec. http://www.insight-electronics.com/ memec/iplanet/link1/virtex11mbv1000.pdf.
 
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A. Nilsson. Compiling Java for real-time systems. Licentiate thesis, Lund Institute of Technology, 2004.
 
10
M. Schoeberl. JOP: A java optimized processor. In Workshop on Java Technologies for Real-Time and Embedded Systems, November 2003.
 
11
SystemC. the open systemC initiative. http://www.systemc.org.
 
12
Xilinx. MicroBlaze Processor Reference Guide, EDK v6.2 edition, June 14 2004.


Collaborative Colleagues:
F. Gruian: colleagues
P. Andersson: colleagues
K. Kuchcinski: colleagues
M. Schoeberl: colleagues