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Feedback EDF scheduling exploiting hardware-assisted asynchronous dynamic voltage scaling
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Source ACM SIGPLAN Notices archive
Volume 40 ,  Issue 7  (July 2005) table of contents
Proceedings of the 2005 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
SESSION: Real-time techniques table of contents
Pages: 203 - 212  
Year of Publication: 2005
ISSN:0362-1340
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Authors
Yifan Zhu  North Carolina State University, Raleigh, NC
Frank Mueller  North Carolina State University, Raleigh, NC
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 7,   Downloads (12 Months): 53,   Citation Count: 5
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ABSTRACT

Recent processor support for dynamic frequency and voltage scaling (DVS) allows software to affect power consumption by varying execution frequency and supply voltage on the fly. However, processors generally enter a sleep state while transitioning between frequencies/voltages. In this paper, we examine the merits of hardware/software co-design for a feedback DVS algorithm and a novel processor capable of executing instructions during frequency/voltage transitions. We study several power-aware feedback schemes based on earliest-deadline-first (EDF) scheduling that adjust the system behavior dynamically for different workload characteristics. An infrastructure for investigating several hard real-time DVS schemes, including our feedback DVS algorithm, is implemented on an IBM PowerPC 405LP embedded board. Architecture and algorithm overhead is assessed for different DVS schemes. Measurements on the experimentation board provide a quantitative assessment of the potential of energy savings for DVS algorithms as opposed to prior simulation work that could only provide trends. Energy consumption, measured through a data acquisition board, indicates a considerable potential for real-time DVS scheduling algorithms to lower energy up to 64% over the naïve DVS scheme. Our feedback DVS algorithm saves at least as much and often considerably more energy than previous DVS algorithms with peak savings of an additional 24% energy reduction. To the best of our knowledge, this is the first comparative study of real-time DVS algorithms on a concrete micro-architecture and the first evaluation of asynchronous DVS switching.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
 
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B. Brock and K. Rajamani. Dynamic power management for embedded systems. In IEEE International SOC Conference, Sept. 2003.
 
4
A. Chandrakasan, S. Sheng, and R. W. Brodersen. Low-power cmos digital design. In IEEE Journal of Solid-State Circuits, Vol. 27, pp. 473--484., April, 1992.
5
6
7
 
8
D. Grunwald, P. Levis, C. M. III, M. Neufeld, and K. Farkas. Policies for dynamic clock scheduling. In Symp. on Operating Systems Design and Implementation, Oct 2000.
 
9
IBM and MontaVisa Software. Dynamic power management for embedded systems. white paper.
 
10
R. Jejurikar and R. Gupta. Integrating preemption threshold scheduling and dynamic voltage scaling for energy efficient real-time systems. In Proceedings of the 10th International Conference on Real-Time and Embedded Computing Systems and Applications (RTCSA '04), 25--27 Aug 2004.
 
11
12
 
13
 
14
C. Lu, J. A. Stankovic, T. F. Abdelzaher, G. Tao, S. H. Son, and M. Marley. Performance specifications and metrics for adaptive real-time systems. In Proceedings of the IEEE Real-Time Systems Symposium, December 2000. 2000.
 
15
16
 
17
R. Minerick, V. W. Freeh, and P. M. Kogge. Dynamic power management using feedback. In Proceedings of Workshop on Compilers and Operating Systems for Low Power, 2002.
 
18
 
19
T. Pering, T. Burd, and R. Brodersen. The simulation of dynamic voltage scaling algorithms. In Symp. on Low Power Electronics, 1995.
20
 
21
D. Shin, W. Kim, J. Jeon, J. Kim, and S. L. Min. Simdvs: An integrated simulation environment for performance evaluation of dynamic voltage scaling algorithms. In Workshop on Power-Aware Computer Systems, Feb. 2002.
 
22
J. A. Stankovic, C. Lu, S. H. Son, and G. Tao. The case for feedback control real-time scheduling. In Proceedings of the EuroMicro Conference on Real-Time Systems, June 1999.
23
 
24
M. Weiser, B. Welch, A. Demers, and S. Shenker. Scheduling for reduced cpu energy. In 1st Symp. on Operating Systems Design and Implementation, Nov 1994.
 
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Collaborative Colleagues:
Yifan Zhu: colleagues
Frank Mueller: colleagues