A 120nm low power asynchronous ADC

Subscribe (Full Service)


	Search: The ACM Digital Library The Guide

	Feedback

A 120nm low power asynchronous ADC

Full text

Pdf (3.65 MB)

Source

International Symposium on Low Power Electronics and Design archive
Proceedings of the 2005 international symposium on Low power electronics and design table of contents

San Diego, CA, USA

SESSION: Converter and communication circuits table of contents

Pages: 60 - 65

Year of Publication: 2005

ISBN:1-59593-137-6

Authors

E. Allier	Concurrent Integrated Systems Group, Grenoble Cedex - France
J. Goulier	STMicroelectronics - CR&D, Crolles Cedex - France
G. Sicard	Concurrent Integrated Systems Group, Grenoble Cedex - France
A. Dezzani	Concurrent Integrated Systems Group, Grenoble Cedex - France
E. André	STMicroelectronics - CR&D, Crolles Cedex - France
M. Renaudin	Concurrent Integrated Systems Group, Grenoble Cedex - France

Sponsors

SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 13, Downloads (12 Months): 106, Citation Count: 1

Additional Information:

abstract references cited by index terms collaborative colleagues

Tools and Actions:	Review this Article Save this Article to a Binder Display Formats: BibTex EndNote ACM Ref

DOI Bookmark:	Use this link to bookmark this Article: http://doi.acm.org/10.1145/1077603.1077619 What is a DOI?

ABSTRACT

This paper discusses the development of a new kind of low power processing chain which dynamically adapts sampling frequency to signals. Thus, the design of an Asynchronous Analog-to-Digital Converter (A-ADC) is tackled. Its principle is based on a non-uniform sampling scheme and asynchronous technology, that allow significant activity and power savings. A test chip targetting 10-bit speech applications has been fabricated using the 120nm CMOS process from STMicroelectronics. The power consumption is lower than 180µW leading to a Figure of Merit two times better than those of classical Nyquist converters recently published

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	F. Aeschlimann, E. Allier, L. Fequet, M. Renaudin, "Asynchronous FIR Filters: Towards a New Digital Processing Chain", Proceedings of the ASYNC Conference, pp. 198--206, April 19-23 2004, Crete, Greece.
	2	E. Allier , G. Sicard , L. Fesquet , M. Renaudin, A New Class of Asynchronous A/D Converters Based on Time Quantization, Proceedings of the 9th International Symposium on Asynchronous Circuits and Systems, p.196, May 12-15, 2003
	3	M. Renaudin, Asynchronous circuits and systems: a promising design alternative, Microelectronic Engineering, v.54 n.1-2, p.133-149, Dec. 2000
	4	David Kinniment , Alex Yakovlev , Bo Gao, Synchronous and asynchronous A-D conversion, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.8 n.2, p.217-220, April 2000 [doi>10.1109/92.831441 ]
	5	D.J. Kinniment, A.V. Yakovlev, "Low Power, Low Noise Micropipelined Flash A-D Converter", IEE Proceedings on Circuits Devices Systems, Vol. 146, n° 5, pp. 263--267, October 1999.
	6	M. Conti, S. Orcioni, C. Turchetti, G. Biagetti, "A Current Mode Multistable Memory Using Asynchronous Successive Approximation A/D Converter", IEEE International Conference on Electronics, Circuits and Systems, Cyprus, September 1999.
	7	L. Alacoque, M. Renaudin, S. Nicolle, "An Irregular Sampling and Local Quantification Scheme A-D Converter", IEE Electronics Letters, Vol. 39, n°3, pp. 263--264, February 2003.
	8	J.W. Mark, T.D. Todd, "A Nonuniform Sampling Approach to Data Compression", IEEE Transactions on Communications, Vol. COM-29, n° 4, pp. 24--32, January 1981.
	9	N. Sayiner, H.V. Sorensen, T.R. Viswanathan, "A Level-Crossing Sampling Scheme for A/D Conversion", IEEE Transactions on Circuits and Systems II, Vol. 43, n° 4, pp. 335--339, April 1996.
	10	F.J. Beutler, "Error-Free Recovery from Irregularly Spaced samples", SIAM Review, Vol. 8, No. 3, pp. 328--335, July 1966.
	11	L.R. Rabiner, R.W. Schafer, "Digital Processing of Speech Signals", Prentice Hall Inc., 1978.
	12	I. E. Sutherland, Micropipelines, Communications of the ACM, v.32 n.6, p.720-738, June 1989 [doi>10.1145/63526.63532]
	13	Optimizing CMOS Implementations of the C-element, Proceedings of the 1997 International Conference on Computer Design (ICCD '97), p.700, October 12-15, 1997
	14	Alain J. Martin, Programming in VLSI: from communicating processes to delay-insensitive circuits, Developments in concurrency and communication, Addison-Wesley Longman Publishing Co., Inc., Boston, MA, 1991
	15	R. Ginosar, "Synchronization and Arbitration", ACiD Summer School on Asynchronous Circuit Design, July 15-19, 2002, Grenoble, France.
	16	J. Sauerbrey, D. Schmitt-Landsiedel, R. Thewes, "A 0.5V, 1μV Successive Approximation ADC", ESSCIRC proceedings, September 24-26 2002, Firenze, Italy.
	17	M.D. Scott, B.E. Boser, K.S.J. Pister, "An Ultra-Low Power ADC for Distributed Sensor Networks", ESSCIRC proceedings, September 24-26 2002, Firenze, Italy.
	18	B.J. McCarroll, C.G. Sodini, H.S. Lee "A High-Speed CMOS Comparator for Use in an ADC", IEEE Journal of Solid State Circuits, Vol. 23, n° 1, February 1988.
	19	R.H. Walden, "Analog-to-Digital Converter Survey and Analysis", IEEE Journal on Selected Areas in Communications, Vol. 17, n° 4, pp. 539--550, April 1999.
	20	E. Allier, "Asynchronous Analog to Digital Interface: a New Class of Converters Based on Time Quantization", PhD. Thesis, Institut National Polytechnique de Grenoble, France, ISBN 2-84813-016-4.