A low power current steering digital to analog converter in 0.18 Micron CMOS

ABSTRACT

This paper discusses a number of circuit techniques which address the DC and AC distortion performance of a low power current steering Digital-to-Analog Converter design. The design provides 14 bit resolution and 200 MSPS conversion rate in a 1P4M 0.18 micron CMOS process, with optional 3.3 volt compatible devices, while operating over a wide 3.6 to 1.8 volt supply range. A power dissipation /conversion rate figure of merit of as low as 0.17 mW/MSPS was achieved for 1.8V operation and as low as 0.28 mW/MSPS at 3.3V. SFDR of 70dB is achieved at a 50 MHz output frequency

REFERENCES

• 1: D. Mercer , L. Singer, 12-b 125 MSPS CMOS D/A designed for spectral performance, Proceedings of the 1996 international symposium on Low power electronics and design, p.243-246, August 12-14, 1996, Monterey, California, United States
• 2: Schofield, W., Mercer, D., St. Onge, L., "A 16b 400MS/s DAC with <-80dBc IMD to 300MHz and <-160dBm/Hz noise power spectral density "; ISSCC 2003 Digest of Technical Papers, 9-13 Feb.2003 Pages: 126--127
• 3: Tiilikainen, M., "A 14-bit 1.8-V 20mW 1-mm 2 CMOS DAC " IEEE J. Solid State Circuits, vol.36, no.7, July 2001
• 4: Cong, Y. Geiger, R. "A 1.5V 14-Bit 100-MS/s Self Calibrated DAC ", IEEE J.Solid State Circuits, vol 38, no 12, Dec. 2003
• 5: Deveugele, J., Steyaert, M., "A 10b 250MS/s Binary-Weighted Current-Steering DAC " IEEE, ISSCC 2004 Digest of Technical Papers
• 6: United States patent applied for.

INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.m Miscellaneous

General Terms:
Design

Keywords:
CMOS, DAC, converter, current mode