| Energy reduction in multiprocessor systems using transactional memory |
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International Symposium on Low Power Electronics and Design
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Proceedings of the 2005 international symposium on Low power electronics and design
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San Diego, CA, USA
POSTER SESSION: I/O and memory system design
table of contents
Pages: 331 - 334
Year of Publication: 2005
ISBN:1-59593-137-6
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Downloads (6 Weeks): 6, Downloads (12 Months): 59, Citation Count: 1
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ABSTRACT
The emphasis in microprocessor design has shifted from high performance, to a combination of high performance and low power. Until recently, this trend was mostly true for uniprocessors. In this work we focus on new energy consumption issues unique to multiprocessor systems: synchronization of accesses to shared memory. We investigate and compare different means of providing atomic access to shared memory, including locks and lock-free synchronization (i.e., transactional memory), with respect to energy as well as performance. We show that transactional memory has an advantage in terms of energy consumption over locks, but that this advantage largely depends on the system architecture, the contention level, and the policy of conflict resolution
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY
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Cesare Ferri , Amber Viescas , Tali Moreshet , R. Iris Bahar , Maurice Herlihy, Energy efficient synchronization techniques for embedded architectures, Proceedings of the 18th ACM Great Lakes symposium on VLSI, May 04-06, 2008, Orlando, Florida, USA
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