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Error traces in model-based debugging of hardware description languages

Published: 19 September 2005 Publication History

Abstract

In this article we address the fault localization problem in HDLs, particularly in VHDL designs. Our approach relies on the model-based diagnosis paradigm and, unlike to other approaches that rely on the design's gate-level representation, we accurately represent the program's syntax and semantics in a debugging model. This detailed modeling approach, however, may cause scalability problems for larger designs, thus reducing the model's complexity and size is a crucial issue. Creating a debugging model specifically for a given test case in terms of its execution trace is, although tractable in terms of the model's size, uneligible for source level debugging. We illustrate this result by a simple example and relate it to similar findings in the area of program slicing. Moreover, we present a solution to this problem and discuss implications on software debugging by means of our recent empirical results.

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Cited By

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  • (2024)Time-Aware Spectrum-Based Bug Localization for Hardware Design Code with Data PurificationACM Transactions on Architecture and Code Optimization10.1145/367800921:3(1-25)Online publication date: 12-Jul-2024
  • (2017)Debugging approaches on various software processing levels2017 International conference of Electronics, Communication and Aerospace Technology (ICECA)10.1109/ICECA.2017.8212821(302-306)Online publication date: Apr-2017
  • (2011)Ladder programs validation through model-code traceability2011 IEEE International Conference on Industrial Technology10.1109/ICIT.2011.5754386(276-280)Online publication date: Mar-2011
  • Show More Cited By

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cover image ACM Conferences
AADEBUG'05: Proceedings of the sixth international symposium on Automated analysis-driven debugging
September 2005
172 pages
ISBN:1595930507
DOI:10.1145/1085130
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 19 September 2005

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Author Tags

  1. automated debugging
  2. conditional dependency
  3. error trace
  4. fault localization
  5. potential influence
  6. software debugging
  7. source-level debugging

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Cited By

View all
  • (2024)Time-Aware Spectrum-Based Bug Localization for Hardware Design Code with Data PurificationACM Transactions on Architecture and Code Optimization10.1145/367800921:3(1-25)Online publication date: 12-Jul-2024
  • (2017)Debugging approaches on various software processing levels2017 International conference of Electronics, Communication and Aerospace Technology (ICECA)10.1109/ICECA.2017.8212821(302-306)Online publication date: Apr-2017
  • (2011)Ladder programs validation through model-code traceability2011 IEEE International Conference on Industrial Technology10.1109/ICIT.2011.5754386(276-280)Online publication date: Mar-2011
  • (2005)H-DBUG: A High-level Debugging Framework for Protocol Verification using Assertions2005 Annual IEEE India Conference - Indicon10.1109/INDCON.2005.1590136(115-118)Online publication date: 2005

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