skip to main content
10.1109/ICCAD.2004.1382583acmconferencesArticle/Chapter ViewAbstractPublication PagesiccadConference Proceedingsconference-collections
Article

A flexibility aware budgeting for hierarchical flow timing closure

Published: 07 November 2004 Publication History

Abstract

We present a new block budgeting algorithm which speeds up timing closure in timing driven hierarchical flows. After a brief description of the addressed flow, block budgeting challenges are detailed. Then, we explain why existing budgeting approaches are not adapted to fulfil these challenges. A new block budgeting algorithm is proposed. In order to derive relevant block constraints, this algorithm analyzes the design flexibility. This flexibility aware budgeting (FAB) approach is then compared to some previous ones. Experiments based on commercial EDA tools and real designs show up to 55 % reduction in hierarchical flow run time and lead to a good flow timing closure.

References

[1]
{1} M. Sarrafzadeh, D. A. Knol, and G. E. Téllez, "A delay budgeting algorithm ensuring maximum flexibility in placement," in IEEE Trans. Computer-Aided Design, vol. 16, Nov. 1997, pp. 1332-1341.
[2]
{2} H. Youssef, R.-B. Lin, and E. Shragowitz, "Bounds on net delays for VLSI circuits," in IEEE Proc. Of ISCAS, 1992, pp. 815-824.
[3]
{3} J. Frankle, "Iterative and adaptive slack allocation for performance-driven layout," in IEEE/ACM Proc. of DAC, June 1992, pp. 536-542.
[4]
{4} C.-C. Kuo and A. C.-H. Wu, "Delay budgeting for a timing-closure-driven design method," in IEEE Proc. of ICCAD, 2000.
[5]
{5} K. Shi and G. Godwin, "Hybrid hierarchical timing closure methodology for a high performance and low power dsp," in IEEE/ACM Proc. of DAC, 2005, pp. 850-855.
[6]
{6} I. Sutheland, B. Sproull, and D. Harris, Logical Effort: Designing Fast CMOS Circuits. MORGAN KAUFMANN PUBLISHERS, 1999.
[7]
{7} P. G. Paulin and F. J. Poirot, "Logic decomposition algorithms for the timing optimization of multi-level logic," in IEEE Proc. of ICCD, 1989, pp. 329-333.
[8]
{8} K. J. Singh, A. R. Wang, R. K. Brayton, and A. Saugiovanni-Vincentelli, "Timing optimisation of combinational logic," in IEEE Proc. of ICCAD, 1988, pp. 282-285.
[9]
{9} H. Youssef and E. Shragowitz, "Timing constraints for correct performances," in IEEE Proc. of ICCAD, 1990, pp. 24-27.

Cited By

View all
  • (2010)Bounded potential slackProceedings of the 2010 Asia and South Pacific Design Automation Conference10.5555/1899721.1899859(581-586)Online publication date: 18-Jan-2010
  1. A flexibility aware budgeting for hierarchical flow timing closure

    Recommendations

    Comments

    Information & Contributors

    Information

    Published In

    cover image ACM Conferences
    ICCAD '04: Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
    November 2004
    913 pages
    ISBN:0780387023

    Sponsors

    Publisher

    IEEE Computer Society

    United States

    Publication History

    Published: 07 November 2004

    Check for updates

    Qualifiers

    • Article

    Conference

    ICCAD04
    Sponsor:

    Acceptance Rates

    Overall Acceptance Rate 457 of 1,762 submissions, 26%

    Contributors

    Other Metrics

    Bibliometrics & Citations

    Bibliometrics

    Article Metrics

    • Downloads (Last 12 months)0
    • Downloads (Last 6 weeks)0
    Reflects downloads up to 14 Feb 2025

    Other Metrics

    Citations

    Cited By

    View all
    • (2010)Bounded potential slackProceedings of the 2010 Asia and South Pacific Design Automation Conference10.5555/1899721.1899859(581-586)Online publication date: 18-Jan-2010

    View Options

    Login options

    View options

    PDF

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader

    Figures

    Tables

    Media

    Share

    Share

    Share this Publication link

    Share on social media