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How to bridge the abstraction gap in system level modeling and design

Published: 07 November 2004 Publication History

Abstract

As more and more processors and subsystems are integrated in a single system, the verification bottleneck is driving designers away from RTL and RTL-like strategies for verification and design to higher abstraction levels. Increasing system complexity at the other hand requires much faster simulation and analysis tools. This is leading to new standards and tools around transaction level modeling. Languages such as SystemC and SystemVerilog are rich in behavioral and structural constructs which enable modeling designs at different levels of abstraction without imposing a top-down or bottom-up design flow. In fact, most design flows are iterative and modules at different levels of abstractions have to be considered. A more abstract model is very useful to increase simulation speed and to improve formal verification. SystemC and SystemVerilog stress the importance of verification support for complex SOCs including improvement for hardware verification as well as for the verification of hardware dependent software. In todays design flows the software development can often only start after the hardware is available. This causes unacceptable delays for the software development. The idea of transaction level modeling (TLM) is to provide in an early phase of the hardware development transaction level models of the hardware. Based on these TLMs a fast enough simulation environment is the basis for the development of hardware and hardware dependent software. The presumption is to run these transaction level models at several tens or some hundreds of thousand transactions per second which should be fast enough for system level modeling and verification.

References

[1]
{1} A. Hofman, H. Meyr and R. Leupers, "Architecture Exploration for Embedded Processors with LISA", Kluwer Academic Publishers, 2002.
[2]
{2} T. Groetker, S. Liao, G. Martin and S. Swan, "System Design with SystemC", Kluwer Academic Publishers, 2002.
[3]
{3} W. Müller, W. Rosenstiel, J. Ruf(Eds.), "SystemC-Methodologies and Applications," Kluwer Academic Publishers, 2003.
[4]
{4} A. Clouard, K. Jain, F. Ghenassia, L. Maillet-Contoz, and J. P. Strassen, "Using transactional level models in a SoC design flow", in: {3}.
[5]
{5} "SystemC 2.0 Functional Specification" - Open SystemC Initiative, 2000.

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  • (2019)Software metadataJournal of Systems and Software10.1016/j.jss.2010.01.00183:6(1051-1075)Online publication date: 2-Jan-2019

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cover image ACM Conferences
ICCAD '04: Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
November 2004
913 pages
ISBN:0780387023

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IEEE Computer Society

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Published: 07 November 2004

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  • (2019)Software metadataJournal of Systems and Software10.1016/j.jss.2010.01.00183:6(1051-1075)Online publication date: 2-Jan-2019

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