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Adaptive admittance-based conductor meshing for interconnect analysis

Published: 24 January 2006 Publication History

Abstract

We present a new algorithm for discretizing interconnects, a step that is typically performed to account for the nonuniformity of current flow at high frequencies. The algorithm is based on an easily-computable measure that correlates well with the model accuracy. This measure is used to refine the discretization of interconnects in an adaptive scheme so as to systematically trade off computation against model accuracy. We apply the proposed discretization technique on two classes of problems in the analysis of VLSI interconnects: simulation and frequency-dependent inductance extraction. Numerical results establish that with the interconnect discretizations generated by our algorithm, a reduction in simulation and extraction times by a factor between three and seven can be realized with negligible sacrifice in model accuracy (< 1% error).

References

[1]
C. Cheng, J. Lillis, S. Lin, and N. Chang. Interconnect Analysis and Synthesis. John-Wiley, 2000.
[2]
J. Jain, C.-K. Koh, and V. Balakrishnan. Fast simulation of VLSI interconnects. In Proc. Int. Conf. on Computer Aided Design, pages 93--98, 2004.
[3]
M. Kamon, M. J. Tsuk, and J. K. White. FASTHENRY: A multipole-accelerated 3-D inductance extraction program. IEEE Journal on Microwave Theory and Techniques, 42(9):1750--1758, Sept. 1994.
[4]
T. Makkonen, V. P. Plessky, S. Kondratiev, and M. M. Salomaa. Electromagnetic modeling of package parasitics in SAW-duplexer. In Proc. IEEE Ultrasonics Symposium, pages 29--32, 1996.

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cover image ACM Conferences
ASP-DAC '06: Proceedings of the 2006 Asia and South Pacific Design Automation Conference
January 2006
998 pages
ISBN:0780394518

Sponsors

  • IEEE Circuits and Systems Society
  • SIGDA: ACM Special Interest Group on Design Automation
  • IEICE ESS: Institute of Electronics, Information and Communication Engineers, Engineering Sciences Society
  • IPSJ SIG-SLDM: Information Processing Society of Japan, SIG System LSI Design Methodology

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IEEE Press

Publication History

Published: 24 January 2006

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