Article

System-level communication modeling for network-on-chip synthesis

Authors:

Andreas Gerstlauer,

Dongwan Shin,

Rainer Dömer,

Daniel D. GajskiAuthors Info & Claims

ASP-DAC '05: Proceedings of the 2005 Asia and South Pacific Design Automation Conference

Pages 45 - 48

https://doi.org/10.1145/1120725.1120740

Published: 18 January 2005 Publication History

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Abstract

As we are entering the network-on-chip era and system communication is becoming a dominating factor, communication abstraction and synthesis are becoming the integral part of system design flows. The key to the success of any design flow are well-defined abstraction levels and models, which enable automation of early validation, synthesis and verification. In this paper, we define system communication abstraction layers and corresponding design models that support successive, stepwise refinement from abstract message-passing down to a cycle-accurate, bus-functional implementation. Experimental results show the benefits of our definitions and design flow.

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Cited By

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Bombieri NFummi FQuaglia D(2010)System/network design-space exploration based on TLM for networked embedded systemsACM Transactions on Embedded Computing Systems10.1145/1721695.17217039:4(1-32)Online publication date: 6-Apr-2010
https://dl.acm.org/doi/10.1145/1721695.1721703
Schirner GDömer R(2009)Quantitative analysis of the speed/accuracy trade-off in transaction level modelingACM Transactions on Embedded Computing Systems10.1145/1457246.14572508:1(1-29)Online publication date: 4-Jan-2009
https://dl.acm.org/doi/10.1145/1457246.1457250
Rincón FBarba JMoya FVillanueva FVilla DDondo JLópez J(2009)Transparent IP Cores Integration Based on the Distributed Object ParadigmIntelligent Technical Systems10.1007/978-1-4020-9823-9_10(131-144)Online publication date: 2009
https://doi.org/10.1007/978-1-4020-9823-9_10
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Published In

ASP-DAC '05: Proceedings of the 2005 Asia and South Pacific Design Automation Conference

January 2005

1495 pages

ISBN:0780387376

DOI:10.1145/1120725

General Chair:
Ting-Ao Tang
Fudan University, Shanghai, P. R. China

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

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Published: 18 January 2005

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SIGDA

ASPDAC05: Asia and South Pacific Design Automation Conference

January 18 - 21, 2005

Shanghai, China

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Overall Acceptance Rate 466 of 1,454 submissions, 32%

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Bombieri NFummi FQuaglia D(2010)System/network design-space exploration based on TLM for networked embedded systemsACM Transactions on Embedded Computing Systems10.1145/1721695.17217039:4(1-32)Online publication date: 6-Apr-2010
https://dl.acm.org/doi/10.1145/1721695.1721703
Schirner GDömer R(2009)Quantitative analysis of the speed/accuracy trade-off in transaction level modelingACM Transactions on Embedded Computing Systems10.1145/1457246.14572508:1(1-29)Online publication date: 4-Jan-2009
https://dl.acm.org/doi/10.1145/1457246.1457250
Rincón FBarba JMoya FVillanueva FVilla DDondo JLópez J(2009)Transparent IP Cores Integration Based on the Distributed Object ParadigmIntelligent Technical Systems10.1007/978-1-4020-9823-9_10(131-144)Online publication date: 2009
https://doi.org/10.1007/978-1-4020-9823-9_10
Klingauf WGädke HGünzel RGielen G(2006)TRAINProceedings of the conference on Design, automation and test in Europe: Proceedings10.5555/1131481.1131843(1318-1323)Online publication date: 6-Mar-2006
https://dl.acm.org/doi/10.5555/1131481.1131843
Schirner GDömer RGielen G(2006)Quantitative analysis of transaction level models for the AMBA busProceedings of the conference on Design, automation and test in Europe: Proceedings10.5555/1131481.1131546(230-235)Online publication date: 6-Mar-2006
https://dl.acm.org/doi/10.5555/1131481.1131546
Viaud EPêcheux FGreiner AGielen G(2006)An efficient TLM/T modeling and simulation environment based on conservative parallel discrete event principlesProceedings of the conference on Design, automation and test in Europe: Proceedings10.5555/1131481.1131514(94-99)Online publication date: 6-Mar-2006
https://dl.acm.org/doi/10.5555/1131481.1131514
Schirner GDömer RHassoun S(2006)Fast and accurate transaction level models using result oriented modelingProceedings of the 2006 IEEE/ACM international conference on Computer-aided design10.1145/1233501.1233574(363-368)Online publication date: 5-Nov-2006
https://dl.acm.org/doi/10.1145/1233501.1233574
Schirner GDömer RBergamaschi RChoi K(2006)Accurate yet fast modeling of real-time communicationProceedings of the 4th international conference on Hardware/software codesign and system synthesis10.1145/1176254.1176273(70-75)Online publication date: 22-Oct-2006
https://dl.acm.org/doi/10.1145/1176254.1176273
Klingauf WGünzel RBringmann OParfuntseu PBurton MSentovich E(2006)GreenBusProceedings of the 43rd annual Design Automation Conference10.1145/1146909.1147139(905-910)Online publication date: 24-Jul-2006
https://dl.acm.org/doi/10.1145/1146909.1147139
Shin DGerstlauer ADömer RGajski DEles PJantsch ABergamaschi R(2005)Automatic network generation for system-on-chip communication designProceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis10.1145/1084834.1084899(255-260)Online publication date: 19-Sep-2005
https://dl.acm.org/doi/10.1145/1084834.1084899

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System Synthesis with VHDL: A Transformational Approach

Synthesis of system-level communication by an allocation-based approach

Layout-driven RTL binding techniques for high-level synthesis

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