A practical cut-based physical retiming algorithm for field programmable gate arrays
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Integrated retiming and placement for field programmable gate arrays
FPGA '02: Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arraysRetiming is a synchronous circuit transformation that can optimize the delay of a synchronous circuit by moving registers across combinational circuit elements. The combinational structure remains unchanged and the observable behavior of the circuit is ...
A physical retiming algorithm for field programmable gate arrays (abstract only)
FPGA '03: Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arraysIn this paper, we present a physical retiming algorithm for sequential circuits implemented in field programmable gate arrays (FPGAs). This algorithm can speed up the sequential circuits by reducing delay of all critical paths with negative slacks. By ...
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- IEEE SSCS Shanghai Chapter
- IEEE Beijing Section
- SIGDA: ACM Special Interest Group on Design Automation
- Fudan University
- IEEE CAS
- Chinese Institute of Electronics
- Shanghai IC Industry Association
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Association for Computing Machinery
New York, NY, United States
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