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A Min-area Solution to Performance and RLC Crosstalk Driven Global Routing Problem
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Source with EDA Technofair Design Automation Conference Asia and South Pacific archive
Proceedings of the 2005 conference on Asia South Pacific design automation table of contents
Shanghai, China
SESSION: Routing and interconnects table of contents
Pages: 115 - 120  
Year of Publication: 2005
ISBN:0-7803-8737-6
Authors
Tong Jing  Tsinghua University, Beijing, P. R. China
Ling Zhang  Tsinghua University, Beijing, P. R. China
Jinghong Liang  Tsinghua University, Beijing, P. R. China
Jingyu Xu  Tsinghua University, Beijing, P. R. China
Xianlong Hong  Tsinghua University, Beijing, P. R. China
Jinjun Xiong  UCLA, Los Angeles, California
Lei He  UCLA, Los Angeles, California
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
: Shanghai IC Industry Association
: IEEE SSCS Shanghai Chapter
: IEEE CAS
: IEEE Beijing Section
: Fudan University
: Chinese Institute of Electronics
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 2,   Downloads (12 Months): 16,   Citation Count: 1
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ABSTRACT

This paper presents a novel global routing algorithm, AT-PO-GR, to minimize the routing area under both congestion, timing, and RLC crosstalk constraints. The proposed algorithm is consisted of three key parts: (1) timing and congestion optimization; (2) crosstalk budgeting and estimation; and (3) crosstalk elimination and local refinement. Compared with the recent work introduced in [9] and [10], the proposed algorithm can achieve smaller routing area and fewer shields under the same design constraints, yet use less running time.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
T. Jing, X. L. Hong. "The Key Technologies of Performance Optimization for Nanometer Routing". In: Proc. IEEE ASICON, Beijing, China, 2003, pp. 118--123.
 
2
T. Sakurai, S. Kobayashi, and M. Node. "Simple expressions for interconnecting delay, coupling and crosstalk in VLSI's", In: Proc. IEEE ISCAS, Singapore, 1991, pp.2375--2378.
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T. X. Xue, E. S. Kuh, and D. S. Wang. "Post global routing crosstalk synthesis", IEEE Trans on CAD, 1997, 16(12): pp. 1418--1430.
 
5
J. J. Xiong and L. He. "Full-Chip Routing Optimization With RLC Crosstalk Budgeting", IEEE Trans on CAD, 2004, 23(3) pp. 366--377.
 
6
H. Zhou and D. F. Wong. "Global routing with crosstalk constraints", IEEE Trans on CAD, 1999, 18(11): pp. 1683--1688.
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L. Zhang, T. Jing, X. L. Hong, J. Y. Xu, J. J. Xiong, L. He. "Performance Optimization Global Routing with RLC Crosstalk Constraints", In: Proc. IEEE ASICON, Beijing, China, 2003, pp. 191--194.
 
10
L. Zhang, T. Jing, X. L. Hong, J. Y. Xu, J. J. Xiong, L. He. "Performance and RLC Crosstalk Driven Global Routing", In: Proc. IEEE ISCAS, 2004, Vancouver, Canada, pp. V65--68.
 
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T. Jing, X. L. Hong, H. Y. Bao, et al, "A novel and efficient timing-driven global router for standard cell layout design based on critical network concept", In: Proc. IEEE ISCAS, Scottsdale, Arizona, USA, 2002, pp. I165--168.
 
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Collaborative Colleagues:
Tong Jing: colleagues
Ling Zhang: colleagues
Jinghong Liang: colleagues
Jingyu Xu: colleagues
Xianlong Hong: colleagues
Jinjun Xiong: colleagues
Lei He: colleagues