| A bipolar IF amplifier/RSSI for ASK receiver |
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with EDA Technofair Design Automation Conference Asia and South Pacific
archive
Proceedings of the 2005 conference on Asia South Pacific design automation
table of contents
Shanghai, China
SESSION: Poster session III
table of contents
Pages: 1236 - 1239
Year of Publication: 2005
ISBN:0-7803-8737-6
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Downloads (6 Weeks): 7, Downloads (12 Months): 48, Citation Count: 0
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ABSTRACT
A bipolar logarithmic intermediate-frequency (IF) amplifier with received signal strength indicator (RSSI) circuit for ASK Receiver is presented. The amplifier realizes a piecewise approximation to an exact logarithmic response. In the demodulating Log Amplifiers, a special architecture of RSSI is proposed. There are five stages in the Log amplifiers. Each consists of a limiter amplifier and a gm cell. A 90dB input dynamic range within ±1dB linearity is achieved.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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