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A generalized technique for energy-efficient operating voltage set-up in dynamic voltage scaled processors

Published: 18 January 2005 Publication History

Abstract

Dynamic voltage scaling (DVS) which is an effective energy minimization technique has been well-studied in recent years. Yet the problem of selecting voltage levels for multiple voltage DVS systems remains an unresolved issue. In this paper, we present a novel technique for dealing with the problem of finding k operating voltages to minimize the energy consumption (voltage set-up problem). A new formulation of the voltage set-up problem is given to make our solution less dependent on the specific DVS scheme. Then it is solved optimally using dynamic programming in polynomial time. With almost the same time complexity we extend the proposed technique to explore the design space to determine the best number of voltage levels. It is confirmed from the experiments that the proposed voltage set-up solution reduces energy consumption by 19.2% on average over that of previous technique [7].

References

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W. Kwon and T. Kim, "Optimal Voltage Allocation Techniques for Dynamically Variable Voltage Processors", Design Automation Conference, Jun. 2003.
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J. Seo, T. Kim and K. Chung, "Profile-based Optimal Intratask Voltage Scheduling for Hard Real-time Applications", Design Automation Conference, Jun. 2004.
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C. Chen and M. Sarrafzadeh, "Provably Good Algorithm for Low Power Consumption with Dual Supply Voltages", International Conference on Computer-Aided Design, Nov. 1999.
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S. Dhar and D. Maksimović, "Low-Power Digital Filtering Using Multiple Voltage Distribution and Adaptive Voltage Scaling", International Symposium on Low Power Electronics and Design, Jul. 2000.
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S. Hua and G. Qu, "Approaching the Maximum Energy Saving on Embedded Systems with Multiple Voltages", International Conference on Computer-Aided Design, Nov. 2003.
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M. Buss, T. Givargis and N. Dutt, "Exploring Efficient Operating Points for Voltage Scaled Embedded Processor Cores", IEEE International Real-Time Systems Symposium, Dec. 2003.
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D. Shin, J. Kim and S. Lee, "Intra-Task Voltage Scheduling for Low-Energy Hard Real-Time Applications", IEEE Design & Test of Computers, 2001.
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Cited By

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  • (2009)An optimal solution for the heterogeneous multiprocessor single-level voltage-setup problemIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2009.202868328:11(1705-1718)Online publication date: 1-Nov-2009
  • (2008)Noise-aware multiple-voltage assignment for gate-level power optimization2008 Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference10.1109/NEWCAS.2008.4606390(339-342)Online publication date: Jun-2008
  • (2007)A Near-optimal Solution for the Heterogeneous Multi-processor Single-level Voltage Setup Problem2007 IEEE International Parallel and Distributed Processing Symposium10.1109/IPDPS.2007.370247(1-10)Online publication date: Mar-2007

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cover image ACM Conferences
ASP-DAC '05: Proceedings of the 2005 Asia and South Pacific Design Automation Conference
January 2005
1495 pages
ISBN:0780387376
DOI:10.1145/1120725
  • General Chair:
  • Ting-Ao Tang
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Publication History

Published: 18 January 2005

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Cited By

View all
  • (2009)An optimal solution for the heterogeneous multiprocessor single-level voltage-setup problemIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2009.202868328:11(1705-1718)Online publication date: 1-Nov-2009
  • (2008)Noise-aware multiple-voltage assignment for gate-level power optimization2008 Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference10.1109/NEWCAS.2008.4606390(339-342)Online publication date: Jun-2008
  • (2007)A Near-optimal Solution for the Heterogeneous Multi-processor Single-level Voltage Setup Problem2007 IEEE International Parallel and Distributed Processing Symposium10.1109/IPDPS.2007.370247(1-10)Online publication date: Mar-2007

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