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IC failure mechanisms yesterday, today, tomorrow: implications from test to DFM
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Source International Symposium on Physical Design archive
Proceedings of the 2006 international symposium on Physical design table of contents
San Jose, California, USA
SESSION: Failure is not an option table of contents
Pages: 47 - 47  
Year of Publication: 2006
ISBN:1-59593-299-2
Author
Anne Gattiker  IBM Austin Research Lab, Austin, TX
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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ABSTRACT

The failure mechanisms that occur on manufactured ICs affect yield or, worse, shipped product quality level. The difference between the two is in whether or not detection occurs at test. In this talk, we look at the types of failure mechanisms that occur, including random contamination-related defects, systematic defects and systematic parametric variations. We go through an evidence round-up looking empirically at defect occurrences in yesterday's and today's chips and discuss trends for the future. Implications of the various failure mechanisms on detectability at test are discussed and both failure mechanism occurrence and detectability are considered as drivers for DFM.