On-chip 3.3V-to-1.8V voltage down converter for low-power VLSI chips

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On-chip 3.3V-to-1.8V voltage down converter for low-power VLSI chips

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Great Lakes Symposium on VLSI archive
Proceedings of the 16th ACM Great Lakes symposium on VLSI table of contents

Philadelphia, PA, USA

POSTER SESSION: Poster session 1 table of contents

Pages: 140 - 143

Year of Publication: 2006

ISBN:1-59593-347-6

Authors

Qianneng Zhou	Harbin Institute of Technology, Harbin, China
Fengchang Lai	Harbin Institute of Technology, Harbin, China
Mingyan Yu	Harbin Institute of Technology, Harbin, China

Sponsors

ACM: Association for Computing Machinery
SIGDA: ACM Special Interest Group on Design Automation

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ACM New York, NY, USA

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ABSTRACT

This paper proposes a new on-chip 3.3V-to-1.8V voltage down converter, which employs a new reference voltage generator (RVG) and a PMOS pass device with forward-biased source-to-bulk circuit. By the use of the forward-biased source-to-bulk technique, the circuit achieves approximately an 18% output current improvement over its nonforward-biased state. The proposed VDC has characteristic such as output voltage (V_out) is stabilized within ±6mV over a large load current range (0-100mA) and within ±0.16% for ±10% variation of supply voltage. The temperature dependency of Vout is only 0.53mV/0 C with temperature ranging from 0 to 100 0 C.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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