An indirect current sensing technique for IDDQ and IDDT tests

ABSTRACT

An indirect current sensing technique for IDDQ and IDDT tests is proposed in this paper. This is accomplished by utilizing the pervasive on-chip voltage regulators and thus have little or no impact on CUT's design and its performance. We demonstrate that the proposed technique can be applied to both IDDQ and IDDT tests. Experiments were successfully conducted in SPICE simulations assuming the TSMC 0.18μm CMOS technology.

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.8 Performance and Reliability
      B.8.2 Performance Analysis and Design Aids

General Terms:
Measurement

Keywords:
IDDQ, IDDT, BICS, current testing