| A digit serial algorithm for the integer power operation |
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Great Lakes Symposium on VLSI
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Proceedings of the 16th ACM Great Lakes symposium on VLSI
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Philadelphia, PA, USA
POSTER SESSION: Poster session 2
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Pages: 302 - 307
Year of Publication: 2006
ISBN:1-59593-347-6
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Downloads (6 Weeks): 4, Downloads (12 Months): 22, Citation Count: 0
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ABSTRACT
We introduce a right-to-left digit serial algorithm for the integer power operation xy where x and y are positive integers. For n-bit words the algorithm utilizes o(n) additions and does not require use of a multiplier. We describe a hardware implementation and evaluate the effectiveness employing a Synopsys tool set with a standard cell implementation. Out digit serial algorithm compares favorably with a popular iterative square and multiply algorithm implemented with the same tool set.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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A. Fit-Florea, D.W. Matula, M.A. Thornton, "Additive Bit-serial Algorithm for the Discrete Logarithm Modulo 2k ", IEE Electronics Letters Jan. 2005, Vol. 41, No. 2, pp: 57--59.
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Benschop N.F., "Multiplier for the multiplication of at least two figures in an original format" US Patent Nr. 5,923,888, July 13, 1999.
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Szabo, N.S., Tanaka, R.I., "Residue arithmetic and its applications to computer technology", McGraw-Hill Book Company, 1967.
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Synopsys Design/physical Compiler Student Guide. 2003.
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A. Fit-Florea, D.W. Matula, M.A. Thornton, "Addition-Based Exponentiation Modulo 2k ", IEE Electronics Letters, Jan. 2005, Vol. 41, No. 2, pp: 56--57.
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James E. Stine , Johannes Grad , Ivan Castellanos , Jeff Blank , Vibhuti Dave , Mallika Prakash , Nick Iliev , Nathan Jachimiec, A Framework for High-Level Synthesis of System-on-Chip Designs, Proceedings of the 2005 IEEE International Conference on Microelectronic Systems Education (MSE'05), p.67-68, June 12-13, 2005
[doi> 10.1109/MSE.2005.8]
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