Selective code/data migration for reducing communication energy in embedded MpSoC architectures

ABSTRACT

Proliferation of embedded on-chip multiprocessor architectures (MpSoC) motivates researchers from both academia and industry to consider optimization techniques for such architectures. While many proposals on code/data partitioning on parallel architectures try to minimize interprocessor communication requirements at runtime, many applications still have significant runtime communication requirements. This paper proposes a novel task/data migration scheme that decides whether to migrate task or data in order to satisfy a given communication requirement. The choice between the two options is made at runtime based on the statistics collected off-line through profiling. An important characteristic of the approach proposed in this paper is that it takes into account future uses of tasks and data and tries to make a decision that is globally optimal (i.e., when considering multiple communications not just the current one). Our results collected so far are very encouraging and indicate that the proposed selective migration strategy is very successful in practice, reducing communication energy and total energy by 38.6% (resp. 18.9%) and 13.8% (resp. 6.8%) on an average, as compared to task (resp. data) migration only, across ten embedded applications tested.

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INDEX TERMS

Primary Classification:
  D. Software
  D.3 PROGRAMMING LANGUAGES
      D.3.4 Processors
          Subjects: Compilers

Additional Classification:
  C. Computer Systems Organization
  C.1 PROCESSOR ARCHITECTURES
      C.1.2 Multiple Data Stream Architectures (Multiprocessors)
          Subjects: Interconnection architectures (e.g., common bus, multiport memory, crossbar switch)

General Terms:
Algorithms, Design, Experimentation

Keywords:
MPSoC, energy, migration