An energy-efficient temporal encoding circuit technique for on-chip high performance buses

ABSTRACT

In this paper, we propose a novel temporal encoding circuit for generic on-chip buses that enables higher performance while reducing peak energy, average energy and peak current. The proposed circuit dynamically generates shield signals depending on the current and previous state of input data signals to eliminate the worst-case coupling-transitions between adjacent wires. Comparisons to standard on-chip buses of various lengths with optimal repeater insertion in the 0.18-?m CMOS technology show that on-chip buses encoded by such circuit can achieve up to 23% increase in performance, and also provide gains in peak energy (up to 56%) and peak current (up to 60%) at all delay targets. The simulation results of various random input data streams show that the temporally encoded buses obtain up to 44% average energy savings over an optimal standard repeater bus.

REFERENCES

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.4 INPUT/OUTPUT AND DATA COMMUNICATIONS
      B.4.3 Interconnections (subsystems)

General Terms:
Design, Performance

Keywords:
encoding, energy-efficient, on-chip buses, repeaters