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A 124.8Msps, 15.6mW field-programmable variable-length codec for multimedia applications
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Source Design, Automation, and Test in Europe archive
Proceedings of the conference on Design, automation and test in Europe: Designers' forum table of contents
Munich, Germany
SESSION: Media and signal processing table of contents
Pages: 239 - 243  
Year of Publication: 2006
ISBN ~ ISSN:478061 , 3-9810801-0-6
Authors
Chingwei Yeh  Nat'l Chung-Cheng University
Chao-Ching Wang  Nat'l Chung-Cheng University
Lin-Chi Lee  Nat'l Chung-Cheng University
Jinn-Shyan Wang  Nat'l Chung-Cheng University
Sponsors
EDAA : European Design and Automation Association
: The EDA Consortium
IEEE-CS\DATC : The IEEE Computer Society
Publisher
European Design and Automation Association  3001 Leuven, Belgium, Belgium
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ABSTRACT

Variable-length coding is one of the key compression methods for multimedia bitstreams. To accommodate new or user-defined variable-length codes (VLC) for maximal compressions in various applications, we propose a variable-length codec that supports field programmability along with very competitive performance indices. The design has 33% less transistors than its field-programmable predecessor. Moreover, measurement on the real chip demonstrates that the design is capable of processing 124.8 mega-symbols (Msym) per second for MPEG4, while consuming only 15.6mW at 1.4V. When measured by μW/Msym, the realized variable-length codec is even 5% better than the state-of-the-art non-programmable MPEG2 variable-length decoder that hardwires the entire design into random logic.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
Chingwei Yeh: colleagues
Chao-Ching Wang: colleagues
Lin-Chi Lee: colleagues
Jinn-Shyan Wang: colleagues