Systematic stability-analysis method for analog circuits
Pages 150 - 155
Abstract
Analyzing the stability of an analog circuit is an important part of the circuit design. Several commercial simulators are equipped with special stability analysis techniques. Problems arise when your design kit does not support such simulator. Another issue is when the designer wants to get insight into the sources of the instability to propose a stabilization. This can be done through analyzing the open-loop or the closed-loop transfer function of the circuit.The aim of this paper is to propose an automated analysis method which identifies the nodes to be considered for stabilization. The method does not need to break feedback loops or to manipulate netlists. It only uses AC simulations and does not require the full modified nodal equations. The method is illustrated on 3 design examples: a Voltage Controlled Oscillator (VCO), a reference bias circuit and the common-mode feedback network in a gm-C filter.
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- EDAA: European Design Automation Association
- The EDA Consortium
- IEEE-CS\DATC: The IEEE Computer Society
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European Design and Automation Association
Leuven, Belgium
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Published: 06 March 2006
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DATE '06 Paper Acceptance Rate 267 of 834 submissions, 32%;
Overall Acceptance Rate 518 of 1,794 submissions, 29%
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