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Exploring "temperature-aware" design in low-power MPSoCs

Published: 06 March 2006 Publication History

Abstract

The power density inside high performance systems continues to rise with every process technology generation, thereby increasing the operating temperature and creating "hot spots" on the die. As a result, the performance, reliability and power consumption of the system degrade. To avoid these "hot spots", "temperature-aware" design has become a must. For low-power embedded systems though, it is not clear whether similar thermal problems occur. These systems have very different characteristics from the high performance ones: they consume hundred times less power, they are based on a multi-processor architecture with lots of embedded memory and rely on cheap packaging solutions. In this paper, we investigate the need for temperature-aware design in a low-power systems-on-a-chip and provide guidlines to delimit the conditions for which temperature-aware design is needed.

References

[1]
D. Brooks and M. Martonosi. "Dynamic thermal management for high-performance microprocessors. In Proc. IEEE HPCA, Feb. 2001.
[2]
D.Frank, R. Dennard, E. Nowak, P. Solomon, Y. Taur, and H. Wong. Device Scaling Limits of Si MOSFETs and Their Application Dependencies. Proc. IEEE, 89(3):259--, Mar. 2001.
[3]
D. Bertozzi et. al. NoC Synthesis Flow for Customized Domain Specific Multiprocessor Systems-on-Chip. IEEE T. Parallel and Distributed Systems, 16(2):113--129, 2005.
[4]
D. Pham et. al. The design and implementation of a first-generation CELL processor. In Proc. IEEE/ACM ISSCC, pages 184--186, Feb. 2005.
[5]
S. Gunther, F. Binns, and D. Carmean and. J. Hall. Managing the impact of increasing microprocessor power consumption. Intel Technology Journal Q1, 2001.
[6]
S. Heo, K. Barr, and Krste Asanovic. "Reducing Power Density through Activity Migration. In Proc. IEEE/ACM ISLPED, Aug. 2003.
[7]
M. Huang, J. Renau, S. Yoo, and J. Torrellas. A framework for dynamic energy efficiency and temperature management. In Proc. ACM/IEEE Micro, pages 202--213, Dec. 2000.
[8]
W. Hung, Y. Xie, N. Vijaykrishnan, M. Kandemir, and M Irwin. "Thermal-aware allocation and schedulilng for systems-on-chip design. In Proc. IEEE/ACM DATE, pages 898--899, Feb. 2005.
[9]
K. Kanda, K. Nose, H. Kawaguchi, S. Lee, and T. Sakurai. Design Impact of Positive Temperature Dependences on drain current in Sub 1V CMOS VLSIs. IEEE J. Solid State Circuits, 36(10):1559-, Oct. 2001.
[10]
J. Kao, M. Miyazaki, and A. Chandrakasan. A 175mV Multiple-Accumulate Unit Using an Adaptive Supply Voltage and Body Bias Architecture. IEEE J. Solid-State Circuits, 37(11):1545--1555, Nov. 2002.
[11]
W. Liao, F. Li, and L. He. "Microarchitecture level power and thermal simulation considering temperature dependent leakage model. In Proc. IEEE/ACM ISLPED, pages 211--216, Aug. 2003.
[12]
Z. Lu, W. Huang, J. Lach, M. Stan, and K. Skadron. "Interconnect Lifetime Prediction under Dynamic Stress for Reliability-Aware Design. In Proc. IEEE/ACM ICCAD, Nov. 2004.
[13]
Loghi M., Angiolini F., Bertozzi D., Benini L., and Zafalon R. Analyzing Chip Communication in a MPSoC Environment. In Proc. IEEE/ACM DATE, Feb. 2004.
[14]
J. Person. Scaling-Induced Reductions in CMOS Reliability Margins and the Escalating Need for Increased Design-In Reliability Efforts. In Proc. ISQED, pages 123--, 2001.
[15]
C. Poirier, R. McGowen, C. Bostak, and S. Naffziger. Power and temperature control on a 90nm Itanium-Family processor. In Proc. IEEE/ACM ISSCC, pages 304--305, Feb. 2005.
[16]
E. Rohou and M. Smith. "Dynamically managing processor temperature and power. In Proc. 2th workshop on Feedback-directed optimization, Nov. 1999.
[17]
H. Sanchez, B. Kuttanna, T. Olson, M. Alexander, G. Gerosa, R. Philip, and J. Alvarez. "Thermal management for high performance PowerPC microprocessors. In Proc. IEEE Compcon, 1997.
[18]
K. Skadron, M. Stan, W. Huang, S. Velusamy, K. Sankaranarayanan, and D. Tarjan. "Temperature-Aware Microarchitecture. In Proc. IEEE/ACM ISCA, pages 2--13, Jun. 2003.
[19]
H. Su, F. Liu, A. Devgan., E. Acar, and S. Nassif. "Full chip leakage estimation considering power supply and temperature variations. In Proc. IEEE/ACM ISLPED, pages 78--, Aug. 2003.
[20]
B. Vandevelde, E. Driessens, A. Chandrasekhar, and E. Beyne. Characterisation of the polymer stud grid array (PSGA), A lead free CSP for high performance and high reliable packaging. In Proc. SMTA, Sept. 2001.
[21]
Y. Zhang, D. Parikh, K. Sankaranarayanan, K. Skadron, and M. Stan. HotLeakage: A Temperature-Aware Model of Subthreshold and Gate Leakage for Architects. Technical Report CS-2003-05, Univ. of Virginia Dept. of Computer Science, Mar. 2003.

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  • (2010)High level event driven thermal estimation for thermal aware task allocation and schedulingProceedings of the 2010 Asia and South Pacific Design Automation Conference10.5555/1899721.1899903(793-798)Online publication date: 18-Jan-2010
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Published In

cover image Guide Proceedings
DATE '06: Proceedings of the conference on Design, automation and test in Europe: Proceedings
March 2006
1390 pages
ISBN:3981080106

Sponsors

  • EDAA: European Design Automation Association
  • The EDA Consortium
  • IEEE-CS\DATC: The IEEE Computer Society

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European Design and Automation Association

Leuven, Belgium

Publication History

Published: 06 March 2006

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DATE '06 Paper Acceptance Rate 267 of 834 submissions, 32%;
Overall Acceptance Rate 518 of 1,794 submissions, 29%

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Cited By

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  • (2017)Fighting Dark SiliconIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2016.264258725:4(1549-1562)Online publication date: 1-Apr-2017
  • (2015)A calibration based thermal modeling technique for complex multicore systemsProceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition10.5555/2755753.2757076(1138-1143)Online publication date: 9-Mar-2015
  • (2010)High level event driven thermal estimation for thermal aware task allocation and schedulingProceedings of the 2010 Asia and South Pacific Design Automation Conference10.5555/1899721.1899903(793-798)Online publication date: 18-Jan-2010
  • (2010)A virtual platform environment for exploring power, thermal and reliability management control strategies in high-performance multicoresProceedings of the 20th symposium on Great lakes symposium on VLSI10.1145/1785481.1785553(311-316)Online publication date: 16-May-2010
  • (2010)An integrated thermal estimation framework for industrial embedded platformsProceedings of the 20th symposium on Great lakes symposium on VLSI10.1145/1785481.1785550(293-298)Online publication date: 16-May-2010
  • (2010)Online convex optimization-based algorithm for thermal management of MPSoCsProceedings of the 20th symposium on Great lakes symposium on VLSI10.1145/1785481.1785532(203-208)Online publication date: 16-May-2010
  • (2009)A control theory approach for thermal balancing of MPSoCProceedings of the 2009 Asia and South Pacific Design Automation Conference10.5555/1509633.1509645(37-42)Online publication date: 19-Jan-2009
  • (2009)ESL power analysis of embedded processors for temperature and reliability estimationsProceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis10.1145/1629435.1629469(239-248)Online publication date: 11-Oct-2009
  • (2009)Dynamic thermal-aware scheduling on chip multiprocessor for soft real-time systemProceedings of the 19th ACM Great Lakes symposium on VLSI10.1145/1531542.1531631(393-396)Online publication date: 10-May-2009
  • (2009)Thermal balancing policy for multiprocessor stream computing platformsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2009.203237228:12(1870-1882)Online publication date: 1-Dec-2009
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