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A control theoretic approach to run-time energy optimization of pipelined processing in MPSoCs

Published: 06 March 2006 Publication History

Abstract

In this work we take a control-theoretic approach to feedback-based dynamic voltage scaling (DVS) in Multi Processor System on Chip (MPSoC) pipelined architectures. We present and discuss a novel feedback approach based on both linear and non-linear techniques aimed at controlling interprocessor queue occupancy. Theoretical analysis and experiments, carried out on a cycle-accurate multiprocessor simulation platform, show that feedback-based control reduces energy consumption with respect to standard local DVS policies and highlight that non-linear strategies allows a more flexible and robust implementation in presence of variable workload conditions.

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Cited By

View all
  • (2010)On line power optimization of data flow multi-core architecture based on vdd-hopping for local DVFSProceedings of the 20th international conference on Integrated circuit and system design: power and timing modeling, optimization and simulation10.5555/1950238.1950251(94-104)Online publication date: 7-Sep-2010
  • (2009)A feedback-based approach to DVFS in data-flow applicationsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2009.203043928:11(1691-1704)Online publication date: 1-Nov-2009
  • (2008)An energy-aware co-simulation framework for the design of wireless sensor networksProceedings of the 18th ACM Great Lakes symposium on VLSI10.1145/1366110.1366199(375-378)Online publication date: 4-May-2008
  • Show More Cited By

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Published In

cover image Guide Proceedings
DATE '06: Proceedings of the conference on Design, automation and test in Europe: Proceedings
March 2006
1390 pages
ISBN:3981080106

Sponsors

  • EDAA: European Design Automation Association
  • The EDA Consortium
  • IEEE-CS\DATC: The IEEE Computer Society

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European Design and Automation Association

Leuven, Belgium

Publication History

Published: 06 March 2006

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DATE '06 Paper Acceptance Rate 267 of 834 submissions, 32%;
Overall Acceptance Rate 518 of 1,794 submissions, 29%

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Cited By

View all
  • (2010)On line power optimization of data flow multi-core architecture based on vdd-hopping for local DVFSProceedings of the 20th international conference on Integrated circuit and system design: power and timing modeling, optimization and simulation10.5555/1950238.1950251(94-104)Online publication date: 7-Sep-2010
  • (2009)A feedback-based approach to DVFS in data-flow applicationsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2009.203043928:11(1691-1704)Online publication date: 1-Nov-2009
  • (2008)An energy-aware co-simulation framework for the design of wireless sensor networksProceedings of the 18th ACM Great Lakes symposium on VLSI10.1145/1366110.1366199(375-378)Online publication date: 4-May-2008
  • (2006)Synchronization-driven dynamic speed scaling for MPSoCsProceedings of the 2006 international symposium on Low power electronics and design10.1145/1165573.1165655(346-349)Online publication date: 4-Oct-2006

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