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McRT-Malloc: a scalable transactional memory allocator
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Source International Symposium on Memory Management archive
Proceedings of the 5th international symposium on Memory management table of contents
Ottawa, Ontario, Canada
SESSION: Scalable parallel allocation table of contents
Pages: 74 - 83  
Year of Publication: 2006
ISBN:1-59593-221-6
Authors
Richard L. Hudson  Intel Corporation
Bratin Saha  Intel Corporation
Ali-Reza Adl-Tabatabai  Intel Corporation
Benjamin C. Hertzberg  Stanford University, Palo Alto, California
Sponsors
SIGPLAN: ACM Special Interest Group on Programming Languages
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 19,   Downloads (12 Months): 236,   Citation Count: 8
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ABSTRACT

Emerging multi-core processors promise to provide an exponentially increasing number of hardware threads with every generation. Applications will need to be highly concurrent to fullyuse the power of these processors. To enable maximum concurrency, libraries (such as malloc-free packages) would therefore need to use non-blocking algorithms. But lock-free algorithms are notoriously difficult to reason about and inappropriate for average programmers. Transactional memory promises to significantly ease concurrent programming for the average programmer. This paper describes a highly efficient non-blocking malloc/free algorithm that supports memory allocation and deallocation inside transactional code blocks. Thus this paper describes a memory allocator that is suitable for emerging multi-core applications, while supporting modern concurrency constructs.This paper makes several novel contributions. It is the first to integrate a software transactional memory system with a malloc/free based memory allocator. We present the first algorithm which ensures that space allocated in an aborted transaction is properly freed and does not lead to a space blowup. Unlike previous lock-free malloc packages, our algorithm avoids atomic operations on typical code paths, making our algorithm substantially more efficient.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Allan, E., Chase, D., Luchango, V., Maessen, J., Ryu, S., Steele Jr., G., Tobin-Hochstadt, S. The Fortress language specification, version 0.618. Sun Microsystems Technical Report, April 2005.
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Ennals, R. Cache sensitive software transactional memory. Technical Report.
 
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CITED BY  8
 
 
 

Collaborative Colleagues:
Richard L. Hudson: colleagues
Bratin Saha: colleagues
Ali-Reza Adl-Tabatabai: colleagues
Benjamin C. Hertzberg: colleagues