The good, the bad, and the ugly of silicon debug

ABSTRACT

Silicon debug begins with the arrival of design prototypes and can continue well after a product has gone into production. It is perhaps the most exciting and challenging stage of the integrated circuit development process. This paper gives an overview of silicon debug, and describes tools and methods used during the debug process.

REFERENCES

• 1: Josephson, D., Gottlieb, B. Advances in Electronic Testing - Challenges and Methodologies: Chapter 3 (Silicon Debug), pp. 77--108, Gizopoulos, D. (Editor), Springer, 2005, ISBN 0-387-29408-2.
• 2: Don Douglas Josephson, The Manic Depression of Microprocessor Debug, Proceedings of the 2002 IEEE International Test Conference, p.657, October 07-10, 2002
• 3: Keith Baker , Jos Van Beers, Shmoo Plotting: The Black Art of IC Testing, IEEE Design & Test, v.14 n.3, p.90-97, July 1997 [doi>10.1109/54.606005 ]
• 4: Naffziger, S., et al. "The Implementation of a 2-core, Multi-threaded Itanium Family Processor", IEEE Journal of Solid State Circuits, Volume 41, Issue 1, pp. 201--204, January 2006.
• 5: Mario Paniccia , Travis Eiles , V. R. M. Rao , Wai Mun Yee, Novel optical probing technique for flip chip packaged microprocessors, Proceedings of the 1998 IEEE International Test Conference, p.740-747, October 18-22, 1998
• 6: Eiles, T., et al. "Critical Timing Analysis in Microprocessors Using Near-IR Laser Assisted Device Alteration (LADA)", Proc. IEEE International Test Conf., pp. 264--273, 2003.
• 7: Bruce, M., Bruce, V. "ABCs of Emission Microscopy", Electronic Device Failure Analysis, pp. 13--20, Volume 5, Issue 3, August 2003.
• 8: Tsang, J., et al. "Picosecond imaging circuit analysis", IBM Journal of Research and Development, Vol. 44, No. 4, 2000, pp. 583--603.
• 9: Dan Knebel , Pia Sanda , Moyra M. C. Manus , J. A. Kash , J. C. Tsang , David P. Vallett , Leendert M. Huisman , Phil Nigh , Rick Rizzolo , Peilin Song , Franco Motika, Diagnosis and characterization of timing-related defects by time-dependent light emission, Proceedings of the 1998 IEEE International Test Conference, p.733-739, October 18-22, 1998
• 10: Richard H. Livengood , Donna Medeiros, Design for (Physical) Debug for Silicon Microsurgery and Probing of Flip-Chip Packaged Integrated Circuits, Proceedings of the 1999 IEEE International Test Conference, p.877, September 28-30, 1999
• 11: William Huott , Moyra McManus , Daniel Knebel , Steven Steen , Dennis Manzer , Pia Sanda , Steven Wilson , Yuen Chan , Antonio Pelella , Stanislav Polonsky, The Attack of the "Holey Shmoos": A Case Study of Advanced DFD and Picosecond Imaging Circuit Analysis (PICA), Proceedings of the 1999 IEEE International Test Conference, p.883, September 28-30, 1999
• 12: Don Douglas Josephson , Steve Poehhnan , Vincent Govan, Debug methodology for the McKinley processor, Proceedings of the IEEE International Test Conference 2001, p.451-460, October 30-November 01, 2001
• 13: Carol Pyron , Rekha Bangalore , Dawit Belete , Jason Goertz , Ashutosh Razdan , Denise Younger, Silicon Symptoms to Solutions: Applying Design for Debug Techniques, Proceedings of the 2002 IEEE International Test Conference, p.664, October 07-10, 2002

INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.3 Reliability and Testing**

General Terms:
Design, Verification

Keywords:
characterization, debug, design for test and debug, validation