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Design space exploration and prototyping for on-chip multimedia applications
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 43rd annual conference on Design automation table of contents
San Francisco, CA, USA
SESSION: Session 9: MPSOC design methodologies and applications table of contents
Pages: 137 - 142  
Year of Publication: 2006
ISBN:1-59593-381-6
Authors
Hyung Gyu Lee  Seoul National University, Seoul, Korea
Umit Y. Ogras  Carnegie Mellon University, Pittsburgh, PA
Radu Marculescu  Carnegie Mellon University, Pittsburgh, PA
Naehyuck Chang  Seoul National University, Seoul, Korea
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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ABSTRACT

Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, a shift from computation-bound to communication-bound design becomes mandatory. Towards this end, this paper presents a comprehensive evaluation of two communication architectures targeting multimedia applications. Specifically, we compare and contrast the Network-on-Chip (NoC) and Point-to-Point (P2P) communication architectures in terms of power, performance, and area. As the main contribution, we present complete P2P and NoC-based implementations of a real multimedia application (MPEG-2 encoder), and provide direct measurements using a FPGA prototype and actual video clips, rather than simulation and synthetic workload. From an experi-mental standpoint, we show that the NoC architecture scales very well in terms of area, performance, power and design effort, while the P2P architecture scales poorly on all accounts except performance.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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J. Hu and R. Marculescu, "Energy-and Performance-Aware Mapping for Regular NoC Architectures," In IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, 24(4), April 2005.
 
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M. Kim, D. Kim, and G. E. Sobelman, "MPEG-4 performance analysis for a CDMA network-on-chip," In Proc. Intl. Conf. on CommunicationsCircuits and Systems (ICCCS), 2005.
 
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K. Lee, et. al., "A 51mW 1.6GHz On-Chip Network for Low-Power Heterogeneous SoC Platform," In Proc. ISSCC, San Francisco, Feb. 2004.
 
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P.T. Wolkotte, et. al., "Energy model of networks-on-chip and bus," In Proc. Intl. Symp. on System-on-Chip, 2005.
 
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Collaborative Colleagues:
Hyung Gyu Lee: colleagues
Umit Y. Ogras: colleagues
Radu Marculescu: colleagues
Naehyuck Chang: colleagues