| Fast algorithms for slew constrained minimum cost buffering |
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Annual ACM IEEE Design Automation Conference
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Proceedings of the 43rd annual conference on Design automation
table of contents
San Francisco, CA, USA
SESSION: Session 18: buffer insertion
table of contents
Pages: 308 - 313
Year of Publication: 2006
ISBN:1-59593-381-6
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Authors
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Shiyan Hu
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Texas A&M University, College Station, TX
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Charles J. Alpert
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IBM Austin Research, Austin, TX
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Jiang Hu
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Texas A&M University, College Station, TX
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Shrirang Karandikar
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IBM Austin Research, Austin, TX
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Zhuo Li
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Texas A&M University, College Station, TX
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Weiping Shi
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Texas A&M University, College Station, TX
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C. N. Sze
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IBM Austin Research, Austin, TX
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Downloads (6 Weeks): 7, Downloads (12 Months): 28, Citation Count: 4
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ABSTRACT
As a prevalent constraint, sharp slew rate is often required in circuit design which causes a huge demand for buffering resources. This problem requires ultra-fast buffering techniques to handle large volume of nets, while also minimizing buffering cost. This problem is intensively studied in this paper. First, a highly efficient algorithm based on dynamic programming is proposed to optimally solve slew buffering with discrete buffer locations. Second, a new algorithm is developed to handle the difficult cases in which no assumption is made on buffer input slew. Third, an adaptive buffer selection approach is proposed to efficiently handle slew buffering with continuous buffer locations. Experiments on industrial netlists demonstrate that our algorithms are very effective and highly efficient: we achieve > 100X speed up and save up to 40% buffer area over the commonly-used van Ginneken style buffering.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Charles J. Alpert , Anirudh Devgan , Stephen T. Quay, Buffer insertion for noise and delay optimization, Proceedings of the 35th annual conference on Design automation, p.362-367, June 15-19, 1998, San Francisco, California, United States
[doi> 10.1145/277044.277145]
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Charles J. Alpert , Anirudh Devgan , Stephen T. Quay, Buffer insertion with accurate gate and interconnect delay computation, Proceedings of the 36th ACM/IEEE conference on Design automation, p.479-484, June 21-25, 1999, New Orleans, Louisiana, United States
[doi> 10.1145/309847.309983]
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Charles Alpert , Andrew B. Kahng , Bao Liu , Ion Măndoiu , Alexander Zelikovsky, Minimum-buffered routing of non-critical nets for slew rate and reliability control, Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design, November 04-08, 2001, San Jose, California
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Charles J. Alpert , Jiang Hu , Sachin S. Sapatnekar , Paul Villarrubia, A practical methodology for early buffer and wire resource allocation, Proceedings of the 38th conference on Design automation, p.189-194, June 2001, Las Vegas, Nevada, United States
[doi> 10.1145/378239.378461]
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Chandramouli V. Kashyap , Charles J. Alpert , Frank Liu , Anirudh Devgan, Closed form expressions for extending step delay and slew metrics to ramp inputs, Proceedings of the 2003 international symposium on Physical design, April 06-09, 2003, Monterey, CA, USA
[doi> 10.1145/640000.640009]
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L. P. P. P. van Ginneken, "Buffer placement in distributed RC-tree networks for minimal Elmore delay," in Proceedings of the IEEE International Symposium on Circuits and Systems, pp. 865--868, 1990.
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CITED BY 4
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Charles J. Alpert , Shrirang Karandikar , Zhuo Li , Gi-Joon Nam , Stephen Quay , Haoxing Ren , Cliff Sze , Paul G. Villarrubia , Mehmet Yildiz, The nuts and bolts of physical synthesis, Proceedings of the 2007 international workshop on System level interconnect prediction, March 17-18, 2007, Austin, Texas, USA
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Zhanyuan Jiang , Shiyan Hu , Jiang Hu , Zhuo Li , Weiping Shi, A new RLC buffer insertion algorithm, Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design, November 05-09, 2006, San Jose, California
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