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Scheduling-based test-case generation for verification of multimedia SoCs

Published: 24 July 2006 Publication History

Abstract

Multimedia SoCs are characterized by a main controller that directs the activity of several cores, each of which is in charge of a stage in the processing of a media stream. The verification of these SoCs is a significant challenge due to time-to-market constraints and system complexity. We present a novel approach to system-level, random test case generation for multimedia SoCs, and a tool, called SoCVer, that implements this approach. We use the SoC's main controller point of view for controlling the flow of data in the SoC. Test case generation is done by allocating processing tasks to the various cores and determining which core processes which data item at what time. Solving these scheduling problems allows SoCVer to generate software for the SoC's main controller; this software coordinates and synchronizes the operations of all the cores on the chip without the need for the real operational software. We demonstrate the use of SoCVer using a DVD player SoC.

References

[1]
Aharon, A., Goodman, D., Levinger, M., Lichtenstein, Y., Malka Y., Metzger, C., Molcho M., and Shurek, G. Test program generation for functional verification of PowerPC processors in IBM. In 32nd Design Automation Conference, pages 279--285, 1995.
[2]
Bergeron, J. Writing Testbenches: Functional Verification of HDL Models. Kluwer Academic Publishers, January 2000.
[3]
Bin, E., Emek, R. Shurek, G., and Ziv, A. Using constraint satisfaction formulation and solution techniques for random test program generation. IBM Systems Journal, 41(3):386--402, 2002.
[4]
Haque, F., Michelson, J. and Khan, K. The Art of Verification with Vera, Verification Central, 2001.
[5]
Mackworth, A. Consistency in Networks of Relations. Artificial Intelligence, 8(1):99--118, 1977.
[6]
Palnitkar, S., Design Verification with e, Prentice Hall, 2003.
[7]
Wile, B., Goss, J. C. and Roesner, W. Comprehensive Functional Verification - The Complete Industry Cycle, Elsevier, 2005.
[8]
ISO/IEC 13818-1: Generic coding of moving pictures and associated audio information.

Cited By

View all
  • (2012)Embedded system verification through constraint-based scheduling2012 IEEE International High Level Design Validation and Test Workshop (HLDVT)10.1109/HLDVT.2012.6418248(92-95)Online publication date: Nov-2012
  • (2008)A Coverage-Driven Constraint Random-Based Functional Verification Method of Memory ControllerProceedings of the 2008 The 19th IEEE/IFIP International Symposium on Rapid System Prototyping10.1109/RSP.2008.12(99-104)Online publication date: 2-Jun-2008
  • (2007)Intelligent interleaving of scenariosProceedings of the 44th annual Design Automation Conference10.1145/1278480.1278700(891-895)Online publication date: 4-Jun-2007
  • Show More Cited By

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  1. Scheduling-based test-case generation for verification of multimedia SoCs

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    cover image ACM Conferences
    DAC '06: Proceedings of the 43rd annual Design Automation Conference
    July 2006
    1166 pages
    ISBN:1595933816
    DOI:10.1145/1146909
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    New York, NY, United States

    Publication History

    Published: 24 July 2006

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    Author Tags

    1. functional verification
    2. system on a chip
    3. test generation

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    DAC06: The 43rd Annual Design Automation Conference 2006
    July 24 - 28, 2006
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    Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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    Cited By

    View all
    • (2012)Embedded system verification through constraint-based scheduling2012 IEEE International High Level Design Validation and Test Workshop (HLDVT)10.1109/HLDVT.2012.6418248(92-95)Online publication date: Nov-2012
    • (2008)A Coverage-Driven Constraint Random-Based Functional Verification Method of Memory ControllerProceedings of the 2008 The 19th IEEE/IFIP International Symposium on Rapid System Prototyping10.1109/RSP.2008.12(99-104)Online publication date: 2-Jun-2008
    • (2007)Intelligent interleaving of scenariosProceedings of the 44th annual Design Automation Conference10.1145/1278480.1278700(891-895)Online publication date: 4-Jun-2007
    • (2007)Using Linear Programming Techniques for Scheduling-Based Random Test-Case GenerationHardware and Software, Verification and Testing10.1007/978-3-540-70889-6_2(16-33)Online publication date: 2007
    • (2006)Using linear programming techniques for scheduling-based random test-case generationProceedings of the 2nd international Haifa verification conference on Hardware and software, verification and testing10.5555/1763218.1763221(16-33)Online publication date: 23-Oct-2006

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