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Timing-constrained and voltage-island-aware voltage assignment

Published: 24 July 2006 Publication History

Abstract

Multi-Vdd is an effective method to reduce both leakage and dynamic power. A key challenge in a multi-Vdd design is to limit the design cost and the demand for level shifters. This can be tackled by grouping cells of different supply voltages into a small number of voltage islands. Recently, an elegant algorithm [7] is proposed for generating voltage islands that balance the power versus design cost tradeoff under performance requirement, according to the placement proximity of the critical cells. One prerequisite of [7] is an initial voltage assignment at the standard cell level that meets timing. In this paper, we present a novel method to produce quality voltage assignment to [7], which not only meets timing but also forms good proximity of the critical cells to provide [7] with a smooth input. The algorithm is based on effective delay budgeting and efficient computation of physical proximity by Voronoi diagram. Our extensive experiments on real industrial designs show that our algorithm leads to 25% - 75% improvement in the voltage island generation, with the computation time only linear to the design size.

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E. Bozorgzadeh, S. Choudhury, and M. Sarrafzadeh. A unified theory of timing budget management. In Proc. of the IEEE/ACM international conference on Computer-aided design, pages 653--659, 2004.
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V. Gerousis. Modeling challenges for 90 nm and below. http://www.us.design-reuse.com/articles/article6326.html.
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L. Guibas, D. Knuth, and M. Sharir. Randomized incremental construction of delaunay and voronoi diagrams. Algorithmica, 7(4):381--413, 1992.
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L. Guibas and J. Stolfi. Primitives for the manipulation of general subdivisions and the computation of voronoi. ACM Trans. Graphics, 4(2):74--123, 1985.
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R. Nair, C. L. Berman, P. S. Hauge, and E. J. Yoffa. Generation of performance constraints for layout. IEEE Trans. Computer-Aided Design, 8(8):860--874, 1989.
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H. Wu, I. Liu, M. D. Wong, and Y. Wang. Post-placement voltage island generation under performance requirement. In Proc. of the IEEE/ACM international conference on Computer-aided design, pages 309--316, 2005.

Cited By

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  • (2023)Design of Digital Integrated Circuits by Improving the Characteristics of Digital CellsMachine Learning-based Design and Optimization of High-Speed Circuits10.1007/978-3-031-50714-4_6(279-336)Online publication date: 31-Dec-2023
  • (2021)Power aware floorplanning in multiple supply voltage domainInternational Journal of Circuit Theory and Applications10.1002/cta.315650:2(382-393)Online publication date: 14-Oct-2021
  • (2018)Design Implementation With Noninteger Multiple-Height Cells for Improved Design Quality in Advanced NodesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2017.273167937:4(855-868)Online publication date: 1-Apr-2018
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    cover image ACM Conferences
    DAC '06: Proceedings of the 43rd annual Design Automation Conference
    July 2006
    1166 pages
    ISBN:1595933816
    DOI:10.1145/1146909
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 24 July 2006

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    Author Tags

    1. low power
    2. timing
    3. voltage assignment
    4. voronoi diagram

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    July 24 - 28, 2006
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    Cited By

    View all
    • (2023)Design of Digital Integrated Circuits by Improving the Characteristics of Digital CellsMachine Learning-based Design and Optimization of High-Speed Circuits10.1007/978-3-031-50714-4_6(279-336)Online publication date: 31-Dec-2023
    • (2021)Power aware floorplanning in multiple supply voltage domainInternational Journal of Circuit Theory and Applications10.1002/cta.315650:2(382-393)Online publication date: 14-Oct-2021
    • (2018)Design Implementation With Noninteger Multiple-Height Cells for Improved Design Quality in Advanced NodesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2017.273167937:4(855-868)Online publication date: 1-Apr-2018
    • (2017)A CAD approach for on-chip PDN with power and supply noise reduction for multi-voltage SOCS in pre-layout stage2017 7th International Symposium on Embedded Computing and System Design (ISED)10.1109/ISED.2017.8303948(1-4)Online publication date: Dec-2017
    • (2017)EDA for cyber-physical systems2017 7th International Symposium on Embedded Computing and System Design (ISED)10.1109/ISED.2017.8303904(1-2)Online publication date: Dec-2017
    • (2015)Mixed Cell-Height Implementation for Improved Design Quality in Advanced NodesProceedings of the IEEE/ACM International Conference on Computer-Aided Design10.5555/2840819.2840938(854-860)Online publication date: 2-Nov-2015
    • (2015)Mixed cell-height implementation for improved design quality in advanced nodes2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1109/ICCAD.2015.7372660(854-860)Online publication date: Nov-2015
    • (2015)Critical path-aware voltage island partitioning and floorplanning for hard real-time embedded systemsIntegration, the VLSI Journal10.1016/j.vlsi.2014.05.00248:C(21-35)Online publication date: 1-Jan-2015
    • (2014)Row Based Dual-VDD Island Generation and PlacementProceedings of the 51st Annual Design Automation Conference10.1145/2593069.2593207(1-6)Online publication date: 1-Jun-2014
    • (2014)F-FM: Fixed-Outline Floorplanning Methodology for Mixed-Size Modules Considering Voltage-Island ConstraintIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2014.235157133:11(1681-1692)Online publication date: Nov-2014
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