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Software architecture exploration for high-performance security processing on a multiprocessor mobile SoC
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 43rd annual conference on Design automation table of contents
San Francisco, CA, USA
SESSION: Session 31: secure systems table of contents
Pages: 496 - 501  
Year of Publication: 2006
ISBN:1-59593-381-6
Authors
Divya Arora  Princeton University, Princeton, NJ
Anand Raghunathan  NEC Laboratories America, Princeton, NJ
Srivaths Ravi  NEC Laboratories America, Princeton, NJ
Murugan Sankaradass  NEC Laboratories America, Princeton, NJ
Niraj K. Jha  Princeton University, Princeton, NJ
Srimat T. Chakradhar  NEC Laboratories America, Princeton, NJ
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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ABSTRACT

We present a systematic methodology for exploring the security processing software architecture for a commercial heterogeneous multiprocessor system-on-chip (SoC) for mobile devices. The SoC contains multiple host processors executing applications and a dedicated programmable security processing engine. We developed an exploration methodology to map the code and data of security software libraries onto the platform, with the objective of maximizing the overall application-visible performance. The salient features of the methodology include (i) the use of real performance measurements from a prototyping board that contains the target platform to drive the exploration, (ii) a new data structure access profiling framework that allows us to accurately model the communication overheads involved in offloading a given set of functions to the security processor, and (iii) an exact branch-and-bound based design space exploration algorithm that determines the best mapping of security library functions and data structures to the host and security processors.We used the proposed framework to map a commercial security library to the target mobile application SoC. The resulting optimized software architecture outperformed several manually-designed software architectures, resulting in upto 12.5X speedup for individual cryptographic operations (encryption, hashing) and 2.2X-6.2X speedup for applications such as a Digital Rights Management (DRM) agent and Secure Sockets Layer (SSL) client. We also demonstrate the applicability of our framework to software architecture exploration in other multiprocessor scenarios.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
Divya Arora: colleagues
Anand Raghunathan: colleagues
Srivaths Ravi: colleagues
Murugan Sankaradass: colleagues
Niraj K. Jha: colleagues
Srimat T. Chakradhar: colleagues