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A parallelized way to provide data encryption and integrity checking on a processor-memory bus

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Albert MartinezAuthors Info & Claims

DAC '06: Proceedings of the 43rd annual Design Automation Conference

Pages 506 - 509

https://doi.org/10.1145/1146909.1147042

Published: 24 July 2006 Publication History

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Abstract

This paper describes a novel engine, called PE-ICE (Parallelized Encryption and Integrity Checking Engine), enabling to guarantee confidentiality and integrity of data exchanged between a SoC (System on Chip) and its external memory. The PE-ICE approach is based on an existing block-encryption algorithm to which the integrity checking capability is added. Simulation results show that the performance overhead of PE-ICE remains low (below 4%) compared to block-encryption-only systems (which provide data confidentiality only).

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You JLee KMoon HCho YPaek Y(2023)KVSEVProceedings of the 2023 ACM Symposium on Cloud Computing10.1145/3620678.3624658(233-248)Online publication date: 30-Oct-2023
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Koylu TOkkerman HReinbrecht CHamdioui STaouil M(2021)Protecting IoT Devices through a Hardware-driven Memory Verification2021 24th Euromicro Conference on Digital System Design (DSD)10.1109/DSD53832.2021.00027(115-122)Online publication date: Sep-2021
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Tao WAilin Y(2021)A Simple BCH Decoder for NoC Interconnects and SoC BusesChinese Journal of Electronics10.1049/cje.2021.03.00730:3(444-450)Online publication date: May-2021
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A parallelized way to provide data encryption and integrity checking on a processor-memory bus

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Block-level added redundancy explicit authentication for parallelized encryption and integrity checking of processor-memory transactions
Transactions on computational science X

The bus between the System on Chip (SoC) and the external memory is one of the weakest points of computer systems: an adversary can easily probe this bus in order to read private data (data confidentiality concern) or to inject data (data integrity ...
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Unencrypted data appearing on the processor-memory bus can result in security violations, e.g., allowing attackers to gather keys to financial accounts and personal data. Although on-chip bus encryption hardware can solve this problem, it requires ...
Convertible Authenticated Encryption Scheme Without Using Conventional One-Way Function

An authenticated encryption allows the designated recipient to verify the authenticity while recovering the message. To protect the recipient's benefit in case of a later dispute, a convertible authenticated encryption scheme allows the recipient to ...

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Published In

DAC '06: Proceedings of the 43rd annual Design Automation Conference

July 2006

1166 pages

ISBN:1595933816

DOI:10.1145/1146909

General Chair:
Ellen M. Sentovich
Cadence Berkeley Labs, Berkeley, CA

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

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Published: 24 July 2006

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July 24 - 28, 2006

CA, San Francisco, USA

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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You JLee KMoon HCho YPaek Y(2023)KVSEVProceedings of the 2023 ACM Symposium on Cloud Computing10.1145/3620678.3624658(233-248)Online publication date: 30-Oct-2023
https://dl.acm.org/doi/10.1145/3620678.3624658
Koylu TOkkerman HReinbrecht CHamdioui STaouil M(2021)Protecting IoT Devices through a Hardware-driven Memory Verification2021 24th Euromicro Conference on Digital System Design (DSD)10.1109/DSD53832.2021.00027(115-122)Online publication date: Sep-2021
https://doi.org/10.1109/DSD53832.2021.00027
Tao WAilin Y(2021)A Simple BCH Decoder for NoC Interconnects and SoC BusesChinese Journal of Electronics10.1049/cje.2021.03.00730:3(444-450)Online publication date: May-2021
https://doi.org/10.1049/cje.2021.03.007
Su YShen JZhang M(2018)A high security and efficiency protection of confidentiality and integrity for off-chip memoryJournal of Ambient Intelligence and Humanized Computing10.1007/s12652-018-0939-4Online publication date: 13-Jul-2018
https://doi.org/10.1007/s12652-018-0939-4
de Clercq Rde Keulenaer RMaena PPreneel BDe Sutter BVerbauwhede IKarri RSinanoglu OSadeghi AYi X(2017)SCMProceedings of the 2017 ACM on Asia Conference on Computer and Communications Security10.1145/3052973.3053044(771-776)Online publication date: 2-Apr-2017
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Garay JKolesnikov VMclellan R(2016)MAC Precomputation with Applications to Secure MemoryACM Transactions on Privacy and Security10.1145/294378019:2(1-21)Online publication date: 17-Sep-2016
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Karule PSelokar P(2016)Firmware upgradation of ARM7 through communication link: Via UART over CAN2016 International Conference on Signal Processing, Communication, Power and Embedded System (SCOPES)10.1109/SCOPES.2016.7955565(80-84)Online publication date: Oct-2016
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Block-level added redundancy explicit authentication for parallelized encryption and integrity checking of processor-memory transactions

Operating system controlled processor-memory bus encryption

Convertible Authenticated Encryption Scheme Without Using Conventional One-Way Function

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