Low-power architectural trade-offs in a VLSI implementation of an adaptive hearing aid algorithm

ABSTRACT

This paper analyzes the power-area trade-off of functionally equivalent architectural implementations of a speech enhancement algorithm for hearing aids. Gate-level simulations and measurements show that an optimum degree of resource sharing (0.60mW in a 0.25μm CMOS process) is more energy-efficient than both the fully time-multiplexed (1.42mW) and the isomorphic architecture (1.54mW), without overly large area overhead (0.77mm² against 0.43mm² and 4.31mm², respectively).

REFERENCES

• 1: Anantha P. Chandrakasan , Robert W. Brodersen, Low Power Digital CMOS Design, Kluwer Academic Publishers, Norwell, MA, 1995
• 2: S. Grassi. Optimized Implementation of Speech Processing Algorithms. University of Neuchâtel, Switzerland, 1998.
• 3: H. Kaeslin. VLSI I Lecture Notes on Architectures of Very Large Scale Integration Circuits. Microelectronics Design Center, Swiss Federal Institute of Technology, Zurich, Switzerland, 2005.
• 4: P. Mosch et al. A 660-μW 50-Mops 1-V DSP for a hearing aid chip set. IEEE Journal on Solid-State Circuits, 35(11):1705--1712, November 2000.
• 5: P. Ruiz-de Clavijo et al. Logic-level fast current simulation for digital cmos circuits. In Proceedings 15th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2005), pages 425--435, September 2005.
• 6: A. Schaub and P. Straub. Spectral sharpening for speech enhancement/noise reduction. In IEEE Acoustics, Speech and Signal Processing (ICASSP-91), pages 993--996, April 1991.
• 7: J. Wassner, H. Kaeslin, N. Felber, and W. Fichtner. Waveform coding for low-power digital filtering of speech data. IEEE Transactions on Signal Processing, 51(6):1656--1661, June 2003.

INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Algorithms implemented in hardware

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: VLSI (very large scale integration)

General Terms:
Algorithms, Design, Measurement

Keywords:
hearing aids, low-power architecture, speech enhancement