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A design approach for radiation-hard digital electronics

Published: 24 July 2006 Publication History

Abstract

In this paper, we present a novel circuit design approach for radiation hardened digital electronics. Our approach is based on the use of shadow gates, whose task it is to protect the primary gate in case it is struck by a heavy cosmic ion. We locally duplicate the gate to be protected, and connect a pair of transistors (or diodes) between the outputs of the original and shadow gates. These transistors turn on when the voltages of the two gates deviate during a radiation strike. Our experiments show that at the level of a single gate, our circuit structure has a delay overhead of about 4% on average, and an area overhead of over 100%. At the circuit level, however, we do not need to protect all gates. We present a methodology to selectively protect specific gates of the circuit in a manner that guarantees radiation tolerance for the entire circuit. With this methodology, we demonstrate that at the circuit level, the delay overhead is about 4% and the placed-and-routed area overhead is 30%, compared to an unprotected circuit (for delay mapped designs).

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    cover image ACM Conferences
    DAC '06: Proceedings of the 43rd annual Design Automation Conference
    July 2006
    1166 pages
    ISBN:1595933816
    DOI:10.1145/1146909
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 24 July 2006

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    Author Tags

    1. SEU
    2. radiation-hard

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    July 24 - 28, 2006
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    Cited By

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    • (2024)Overview on Radiation Damage Effects and Protection Techniques in Microelectronic DevicesScience and Technology of Nuclear Installations10.1155/2024/36169022024:1Online publication date: 30-Mar-2024
    • (2024)Radiation Effects in VLSI Circuits - Part II: Hardening TechniquesIETE Technical Review10.1080/02564602.2024.2389802(1-27)Online publication date: 25-Sep-2024
    • (2023)Research on the Function and Application of Some Classical Combinational Logic ProductsHighlights in Science, Engineering and Technology10.54097/hset.v46i.766046(28-35)Online publication date: 25-Apr-2023
    • (2022)Uncertainty Theories for Real-Time SystemsHandbook of Real-Time Computing10.1007/978-981-287-251-7_64(99-132)Online publication date: 9-Aug-2022
    • (2022)Rad-Hard Model SOI FinTFET for Spacecraft ApplicationAdvances in Micro-Electronics, Embedded Systems and IoT10.1007/978-981-16-8550-7_12(113-119)Online publication date: 23-Apr-2022
    • (2021)Cross-Layer Digital Design Flow for Space Applications2021 IEEE 32nd International Conference on Microelectronics (MIEL)10.1109/MIEL52794.2021.9569065(45-54)Online publication date: 12-Sep-2021
    • (2021)Computational evaluation of a novel beta radiation probe design using integrated circuitsSN Applied Sciences10.1007/s42452-021-04381-23:3Online publication date: 27-Feb-2021
    • (2019)Comparison of Radiation Effects in Custom and Commercially Fabricated Resistive Memory DevicesIEEE Transactions on Nuclear Science10.1109/TNS.2019.295019966:12(2398-2407)Online publication date: Dec-2019
    • (2018)Use of Decoupling Cells for Mitigation of SET Effects in CMOS Combinational Gates2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS)10.1109/ICECS.2018.8617996(361-364)Online publication date: Dec-2018
    • (2016)Systems with Dynamic Real-Time Guarantees in Uncertain and Faulty Execution Environments2016 IEEE Real-Time Systems Symposium (RTSS)10.1109/RTSS.2016.037(303-314)Online publication date: Nov-2016
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