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Low-power bus encoding using an adaptive hybrid algorithm

Published: 24 July 2006 Publication History

Abstract

In this paper, we propose an adaptive low-power bus encoding algorithm based on weighted code mapping (WCM) and the delayed bus technique. The WCM algorithm transforms an original bus data vector to a low-energy code through one-to-one mapping. The code mapping is determined by the data probabilistic distribution in the original sequence. The WCM algorithm considers both the self and coupling capacitance of the bus wires. In addition, we found that applying the delayed-bus technique can further reduce the bus energy. A window-based adaptive encoding algorithm is proposed to improve the energy saving by adaptively changing the code mapping when significant data changes are detected. Experimental results show that the proposed algorithm outperforms the existing heuristic bus encoding algorithms by 20~60% in energy dissipation.

References

[1]
S. R. Sridhara, A. Ahmed, and N. R. Shanbhag, "Area and Energy-Efficient Crosstalk Avoidance Codes for On-Chip Buses,", Proc. Of IEEE International Conference on Computer Design, 2004.
[2]
C. Duan and A. Tirumala, "Analysis and Avoidance of Cross-talk in On-Chip Buses," Hot Interconnects 9, pp. 133--138, Aug. 2001.
[3]
N. K. Samala, D. Radhakrishnan and B. Izadi, "A Novel Deep Sub-micron Bus Coding for Low Energy," Proc. of the International Conference on Embedded Systems and Applications, June 2004.
[4]
B. Victor and K. Keutzer, "Bus Encoding to Prevent Crosstalk Delay," IEEE/ACM International Conference on Computer Aided Design, 2001.
[5]
M.R. Stan and W.P. Burleson, "Bus-Invert Coding for Low Power I/O," IEEE Trans. VLSI Syst., pp. 49--58, Mar 1995.
[6]
Sotiriadis, P., A. P. Chandrakasan, "Bus Energy Reduction by Transition Pattern Coding Using a Detailed Deep Submicrometer Bus Model," IEEE Transactions on Circuits and Systems, pp. 1280--1295, October 2003.
[7]
L. Xie, P. Qiu, and Q. Qiu, "Partitioned Bus Coding for Energy Reduction, " Proc. of Asia and South Pacific Design Automation Conference, Jan. 2005.
[8]
Sotiriadis P., A. P. Chandrakasan, " A Bus energy model for deep sub-micron technology," IEEE Trans. VLSI Syst., vol. 10, pp. 341--350, June 2002.
[9]
Daniel Kifer, Shai Ben-David, Johannes Gehrke, "Detecting Change in Data Streams", Proceedings of the 30th VLDB Conference, 2004.
[10]
E. Cantu-Paz, "A Survey of Parallel Genetic Algorithms," Calculateurs Paralleles, Reseaux et Systems Repartis, Vol. 10, No. 2.
[11]
Maged Ghoneima and Yehea Ismail, "Delayed Line Bus Scheme: A Low-Power Bus Scheme for Coupled On-Chip Buses," Low Power Electronics and Design, 2004. ISLPED'04. pp. 66--69.
[12]
A.R. Brahmbhatt, J. zhang, Qinru Qiu, and Q. Wu, "Adaptive Low-Power Bus Encoding Based on Weighted Code Mapping," Proc. of IEEE International Symposium on Circuits and Systems, May 2006.

Cited By

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  • (2016)MFLPDesign Automation for Embedded Systems10.1007/s10617-015-9170-020:3(191-210)Online publication date: 1-Sep-2016
  • (2015)Bus encoder design for crosstalk and power reduction in RLC modelled VLSI interconnectsJournal of Engineering, Design and Technology10.1108/JEDT-05-2013-004013:3(486-498)Online publication date: 6-Jul-2015
  • (2011)Data coding methods for low-power aided design of submicron interconnectsInternational Workshop on Systems, Signal Processing and their Applications, WOSSPA10.1109/WOSSPA.2011.5931417(5-8)Online publication date: May-2011
  • Show More Cited By

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      cover image ACM Conferences
      DAC '06: Proceedings of the 43rd annual Design Automation Conference
      July 2006
      1166 pages
      ISBN:1595933816
      DOI:10.1145/1146909
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Publication History

      Published: 24 July 2006

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      Author Tags

      1. adaptive algorithm
      2. bus encoding
      3. data probabilistic distribution
      4. delayed bus
      5. low power
      6. weighted code mapping
      7. window based change detection

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      DAC06: The 43rd Annual Design Automation Conference 2006
      July 24 - 28, 2006
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      Cited By

      View all
      • (2016)MFLPDesign Automation for Embedded Systems10.1007/s10617-015-9170-020:3(191-210)Online publication date: 1-Sep-2016
      • (2015)Bus encoder design for crosstalk and power reduction in RLC modelled VLSI interconnectsJournal of Engineering, Design and Technology10.1108/JEDT-05-2013-004013:3(486-498)Online publication date: 6-Jul-2015
      • (2011)Data coding methods for low-power aided design of submicron interconnectsInternational Workshop on Systems, Signal Processing and their Applications, WOSSPA10.1109/WOSSPA.2011.5931417(5-8)Online publication date: May-2011
      • (2008)Bus encoding for simultaneous delay and energy optimizationProceedings of the 2008 international symposium on Low Power Electronics & Design10.1145/1393921.1393976(209-212)Online publication date: 11-Aug-2008
      • (2008)Encoding Techniques for On-Chip Communication ArchitecturesOn-Chip Communication Architectures10.1016/B978-0-12-373892-9.00007-4(253-300)Online publication date: 2008

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